arch: Fix VecReg container alignement to 128bits view

[gem5.git] / tests / long / se / 10.mcf / ref / arm / linux / minor-timing / simout

diff --git a/tests/long/se/10.mcf/ref/arm/linux/minor-timing/simout b/tests/long/se/10.mcf/ref/arm/linux/minor-timing/simout
index d0ca2b5a8698717ee83518ffde2f4f632d96b916..06eacea3062e31cd09e3db8e3728fa0934738b4a 100755 (executable)
--- a/tests/long/se/10.mcf/ref/arm/linux/minor-timing/simout
+++ b/tests/long/se/10.mcf/ref/arm/linux/minor-timing/simout
@@ -3,10 +3,10 @@ Redirecting stderr to build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing/
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Sep 14 2015 23:29:19
-gem5 started Sep 15 2015 02:29:01
-gem5 executing on ribera.cs.wisc.edu
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing
+gem5 compiled Oct 11 2016 00:00:58
+gem5 started Oct 13 2016 20:43:02
+gem5 executing on e108600-lin, pid 17345
+command line: /work/curdun01/gem5-external.hg/build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/minor-timing -re /work/curdun01/gem5-external.hg/tests/testing/../run.py long/se/10.mcf/arm/linux/minor-timing
 
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
@@ -26,4 +26,4 @@ simplex iterations         : 2663
 flow value                 : 3080014995
 checksum                   : 68389
 optimal
-Exiting @ tick 61240850500 because target called exit()
+Exiting @ tick 62552970500 because target called exit()