stats: update stale config.ini files, eio and few other stats.

[gem5.git] / tests / long / se / 40.perlbmk / ref / arm / linux / simple-timing / config.ini

diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini b/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini
index 28c3943fd6f7abbc65020ab2858d6bbb76023e90..fc759c12317ae298504d0a09638c8d1edceaacc8 100644 (file)
--- a/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini
+++ b/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini
@@ -1,22 +1,29 @@
 [root]
 type=Root
 children=system
+eventq_index=0
 full_system=false
+sim_quantum=0
 time_sync_enable=false
 time_sync_period=100000000000
 time_sync_spin_threshold=100000000
 
 [system]
 type=System
-children=cpu membus physmem
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
 boot_osflags=a
-clock=1000
+cache_line_size=64
+clk_domain=system.clk_domain
+eventq_index=0
 init_param=0
 kernel=
+kernel_addr_check=true
 load_addr_mask=1099511627775
+load_offset=0
 mem_mode=timing
 mem_ranges=
 memories=system.physmem
+mmap_using_noreserve=false
 num_work_ids=16
 readfile=
 symbolfile=
@@ -29,21 +36,32 @@ work_end_exit_count=0
 work_item_id=-1
 system_port=system.membus.slave[0]
 
+[system.clk_domain]
+type=SrcClockDomain
+clock=1000
+domain_id=-1
+eventq_index=0
+init_perf_level=0
+voltage_domain=system.voltage_domain
+
 [system.cpu]
 type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
+children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
 branchPred=Null
 checker=Null
-clock=500
+clk_domain=system.cpu_clk_domain
 cpu_id=0
 do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
+dstage2_mmu=system.cpu.dstage2_mmu
 dtb=system.cpu.dtb
+eventq_index=0
 function_trace=false
 function_trace_start=0
 interrupts=system.cpu.interrupts
 isa=system.cpu.isa
+istage2_mmu=system.cpu.istage2_mmu
 itb=system.cpu.itb
 max_insts_all_threads=0
 max_insts_any_thread=0
@@ -52,6 +70,8 @@ max_loads_any_thread=0
 numThreads=1
 profile=0
 progress_interval=0
+simpoint_start_insts=
+socket_id=0
 switched_out=false
 system=system
 tracer=system.cpu.tracer
@@ -61,121 +81,235 @@ icache_port=system.cpu.icache.cpu_side
 
 [system.cpu.dcache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=2
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
+eventq_index=0
 forward_snoops=true
 hit_latency=2
-is_top_level=true
+is_read_only=false
 max_miss_count=0
 mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=262144
 system=system
+tags=system.cpu.dcache.tags
 tgts_per_mshr=20
-two_queue=false
 write_buffers=8
 cpu_side=system.cpu.dcache_port
 mem_side=system.cpu.toL2Bus.slave[1]
 
+[system.cpu.dcache.tags]
+type=LRU
+assoc=2
+block_size=64
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+hit_latency=2
+sequential_access=false
+size=262144
+
+[system.cpu.dstage2_mmu]
+type=ArmStage2MMU
+children=stage2_tlb
+eventq_index=0
+stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
+sys=system
+tlb=system.cpu.dtb
+
+[system.cpu.dstage2_mmu.stage2_tlb]
+type=ArmTLB
+children=walker
+eventq_index=0
+is_stage2=true
+size=32
+walker=system.cpu.dstage2_mmu.stage2_tlb.walker
+
+[system.cpu.dstage2_mmu.stage2_tlb.walker]
+type=ArmTableWalker
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+is_stage2=true
+num_squash_per_cycle=2
+sys=system
+
 [system.cpu.dtb]
 type=ArmTLB
 children=walker
+eventq_index=0
+is_stage2=false
 size=64
 walker=system.cpu.dtb.walker
 
 [system.cpu.dtb.walker]
 type=ArmTableWalker
-clock=500
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+is_stage2=false
 num_squash_per_cycle=2
 sys=system
 port=system.cpu.toL2Bus.slave[3]
 
 [system.cpu.icache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=2
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
+eventq_index=0
 forward_snoops=true
 hit_latency=2
-is_top_level=true
+is_read_only=true
 max_miss_count=0
 mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=131072
 system=system
+tags=system.cpu.icache.tags
 tgts_per_mshr=20
-two_queue=false
 write_buffers=8
 cpu_side=system.cpu.icache_port
 mem_side=system.cpu.toL2Bus.slave[0]
 
+[system.cpu.icache.tags]
+type=LRU
+assoc=2
+block_size=64
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+hit_latency=2
+sequential_access=false
+size=131072
+
 [system.cpu.interrupts]
 type=ArmInterrupts
+eventq_index=0
 
 [system.cpu.isa]
 type=ArmISA
+eventq_index=0
 fpsid=1090793632
+id_aa64afr0_el1=0
+id_aa64afr1_el1=0
+id_aa64dfr0_el1=1052678
+id_aa64dfr1_el1=0
+id_aa64isar0_el1=0
+id_aa64isar1_el1=0
+id_aa64mmfr0_el1=15728642
+id_aa64mmfr1_el1=0
+id_aa64pfr0_el1=17
+id_aa64pfr1_el1=0
 id_isar0=34607377
 id_isar1=34677009
 id_isar2=555950401
 id_isar3=17899825
 id_isar4=268501314
 id_isar5=0
-id_mmfr0=3
+id_mmfr0=270536963
 id_mmfr1=0
 id_mmfr2=19070976
-id_mmfr3=4027589137
+id_mmfr3=34611729
 id_pfr0=49
-id_pfr1=1
-midr=890224640
+id_pfr1=4113
+midr=1091551472
+pmu=Null
+system=system
+
+[system.cpu.istage2_mmu]
+type=ArmStage2MMU
+children=stage2_tlb
+eventq_index=0
+stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
+sys=system
+tlb=system.cpu.itb
+
+[system.cpu.istage2_mmu.stage2_tlb]
+type=ArmTLB
+children=walker
+eventq_index=0
+is_stage2=true
+size=32
+walker=system.cpu.istage2_mmu.stage2_tlb.walker
+
+[system.cpu.istage2_mmu.stage2_tlb.walker]
+type=ArmTableWalker
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+is_stage2=true
+num_squash_per_cycle=2
+sys=system
 
 [system.cpu.itb]
 type=ArmTLB
 children=walker
+eventq_index=0
+is_stage2=false
 size=64
 walker=system.cpu.itb.walker
 
 [system.cpu.itb.walker]
 type=ArmTableWalker
-clock=500
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+is_stage2=false
 num_squash_per_cycle=2
 sys=system
 port=system.cpu.toL2Bus.slave[2]
 
 [system.cpu.l2cache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=8
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
+eventq_index=0
 forward_snoops=true
 hit_latency=20
-is_top_level=false
+is_read_only=false
 max_miss_count=0
 mshrs=20
 prefetch_on_access=false
 prefetcher=Null
 response_latency=20
+sequential_access=false
 size=2097152
 system=system
+tags=system.cpu.l2cache.tags
 tgts_per_mshr=12
-two_queue=false
 write_buffers=8
 cpu_side=system.cpu.toL2Bus.master[0]
 mem_side=system.membus.slave[1]
 
-[system.cpu.toL2Bus]
-type=CoherentBus
+[system.cpu.l2cache.tags]
+type=LRU
+assoc=8
 block_size=64
-clock=500
-header_cycles=1
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+hit_latency=20
+sequential_access=false
+size=2097152
+
+[system.cpu.toL2Bus]
+type=CoherentXBar
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+forward_latency=0
+frontend_latency=1
+response_latency=1
+snoop_filter=Null
+snoop_response_latency=1
+system=system
 use_default_range=false
 width=32
 master=system.cpu.l2cache.cpu_side
@@ -183,18 +317,22 @@ slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walke
 
 [system.cpu.tracer]
 type=ExeTracer
+eventq_index=0
 
 [system.cpu.workload]
 type=LiveProcess
-cmd=perlbmk -I. -I lib lgred.makerand.pl
+cmd=perlbmk -I. -I lib mdred.makerand.pl
 cwd=build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/simple-timing
+drivers=
 egid=100
 env=
 errout=cerr
 euid=100
+eventq_index=0
 executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/perlbmk
 gid=100
 input=cin
+kvmInSE=false
 max_stack_size=67108864
 output=cout
 pid=100
@@ -202,27 +340,54 @@ ppid=99
 simpoint=0
 system=system
 uid=100
+useArchPT=false
+
+[system.cpu_clk_domain]
+type=SrcClockDomain
+clock=500
+domain_id=-1
+eventq_index=0
+init_perf_level=0
+voltage_domain=system.voltage_domain
+
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
 
 [system.membus]
-type=CoherentBus
-block_size=64
-clock=1000
-header_cycles=1
+type=CoherentXBar
+clk_domain=system.clk_domain
+eventq_index=0
+forward_latency=4
+frontend_latency=3
+response_latency=2
+snoop_filter=Null
+snoop_response_latency=4
+system=system
 use_default_range=false
-width=8
+width=16
 master=system.physmem.port
 slave=system.system_port system.cpu.l2cache.mem_side
 
 [system.physmem]
 type=SimpleMemory
 bandwidth=73.000000
-clock=1000
-conf_table_reported=false
+clk_domain=system.clk_domain
+conf_table_reported=true
+eventq_index=0
 in_addr_map=true
 latency=30000
 latency_var=0
 null=false
 range=0:134217727
-zero=false
 port=system.membus.master[0]
 
+[system.voltage_domain]
+type=VoltageDomain
+eventq_index=0
+voltage=1.000000
+