sim_ticks 913189263000 # Number of ticks simulated
final_tick 913189263000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 2288605 # Simulator instruction rate (inst/s)
-host_op_rate 2288605 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1148451794 # Simulator tick rate (ticks/s)
-host_mem_usage 263992 # Number of bytes of host memory used
-host_seconds 795.15 # Real time elapsed on the host
+host_inst_rate 2928853 # Simulator instruction rate (inst/s)
+host_op_rate 2928852 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1469736098 # Simulator tick rate (ticks/s)
+host_mem_usage 279876 # Number of bytes of host memory used
+host_seconds 621.33 # Real time elapsed on the host
sim_insts 1819780127 # Number of instructions simulated
sim_ops 1819780127 # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage 1 # Voltage in Volts
+system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu.inst 7305514036 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 1974795935 # Number of bytes read from this memory
system.physmem.bytes_read::total 9280309971 # Number of bytes read from this memory
system.physmem.bw_total::cpu.inst 7999999926 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 3068994956 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 11068994882 # Total bandwidth to/from this memory (bytes/s)
+system.membus.trans_dist::ReadReq 2270974172 # Transaction distribution
+system.membus.trans_dist::ReadResp 2270974172 # Transaction distribution
+system.membus.trans_dist::WriteReq 160728502 # Transaction distribution
+system.membus.trans_dist::WriteResp 160728502 # Transaction distribution
+system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 3652757018 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 1210648330 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 4863405348 # Packet count per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 7305514036 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 2802573242 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size::total 10108087278 # Cumulative packet size per connected master and slave (bytes)
+system.membus.snoops 0 # Total snoops (count)
+system.membus.snoop_fanout::samples 2431702674 # Request fanout histogram
+system.membus.snoop_fanout::mean 0.751070 # Request fanout histogram
+system.membus.snoop_fanout::stdev 0.432393 # Request fanout histogram
+system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
+system.membus.snoop_fanout::0 605324165 24.89% 24.89% # Request fanout histogram
+system.membus.snoop_fanout::1 1826378509 75.11% 100.00% # Request fanout histogram
+system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
+system.membus.snoop_fanout::min_value 0 # Request fanout histogram
+system.membus.snoop_fanout::max_value 1 # Request fanout histogram
+system.membus.snoop_fanout::total 2431702674 # Request fanout histogram
+system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv
system.cpu.num_busy_cycles 1826378527 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.Branches 214632552 # Number of branches fetched
+system.cpu.op_class::No_OpClass 83736345 4.58% 4.58% # Class of executed instruction
+system.cpu.op_class::IntAlu 1129914150 61.87% 66.45% # Class of executed instruction
+system.cpu.op_class::IntMult 75 0.00% 66.45% # Class of executed instruction
+system.cpu.op_class::IntDiv 0 0.00% 66.45% # Class of executed instruction
+system.cpu.op_class::FloatAdd 805244 0.04% 66.50% # Class of executed instruction
+system.cpu.op_class::FloatCmp 13 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::FloatCvt 100 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::FloatMult 11 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::FloatDiv 24 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::FloatSqrt 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdAdd 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdAddAcc 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdAlu 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdCmp 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdCvt 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdMisc 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdMult 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdMultAcc 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdShift 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdShiftAcc 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdSqrt 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdFloatAdd 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdFloatAlu 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdFloatCmp 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdFloatCvt 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdFloatDiv 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdFloatMisc 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdFloatMult 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdFloatMultAcc 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::SimdFloatSqrt 0 0.00% 66.50% # Class of executed instruction
+system.cpu.op_class::MemRead 449492741 24.61% 91.11% # Class of executed instruction
+system.cpu.op_class::MemWrite 162429806 8.89% 100.00% # Class of executed instruction
+system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::total 1826378509 # Class of executed instruction
---------- End Simulation Statistics ----------
projects / gem5.git / blobdiff