[root]
type=Root
children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
[system]
type=LinuxAlphaSystem
-children=bridge cpu disk0 disk2 intrctrl iobus l2c membus physmem sim_console simple_disk toL2Bus tsunami
+children=bridge cpu disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami
boot_cpu_frequency=500
boot_osflags=root=/dev/hda1 console=ttyS0
console=/dist/m5/system/binaries/console
init_param=0
kernel=/dist/m5/system/binaries/vmlinux
+load_addr_mask=1099511627775
mem_mode=atomic
+memories=system.physmem
+num_work_ids=16
pal=/dist/m5/system/binaries/ts_osfpal
physmem=system.physmem
readfile=tests/halt.sh
symbolfile=
system_rev=1024
system_type=34
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
+system_port=system.membus.port[2]
[system.bridge]
type=Bridge
delay=50000
-fix_partial_write_a=false
-fix_partial_write_b=true
nack_delay=4000
-req_size_a=16
-req_size_b=16
-resp_size_a=16
-resp_size_b=16
+ranges=8796093022208:18446744073709551615
+req_size=16
+resp_size=16
write_ack=false
-side_a=system.iobus.port[0]
-side_b=system.membus.port[0]
+master=system.iobus.port[0]
+slave=system.membus.port[0]
[system.cpu]
type=AtomicSimpleCPU
-children=dcache dtb icache itb
+children=dcache dtb icache interrupts itb tracer
+checker=Null
clock=500
cpu_id=0
defer_registration=false
dtb=system.cpu.dtb
function_trace=false
function_trace_start=0
+interrupts=system.cpu.interrupts
itb=system.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
+numThreads=1
phase=0
profile=0
progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
system=system
+tracer=system.cpu.tracer
width=1
dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
-children=protocol
-adaptive_compression=false
+addr_range=0:18446744073709551615
assoc=4
block_size=64
-compressed_bus=false
-compression_latency=0
+forward_snoops=true
hash_delay=1
+is_top_level=true
latency=1000
-lifo=false
max_miss_count=0
mshrs=4
-prefetch_access=false
-prefetch_cache_check_push=true
+num_cpus=1
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=10000
-prefetch_miss=false
+prefetch_on_access=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
-protocol=system.cpu.dcache.protocol
repl=Null
size=32768
-split=false
-split_size=0
-store_compressed=false
subblock_size=0
tgts_per_mshr=8
trace_addr=0
cpu_side=system.cpu.dcache_port
mem_side=system.toL2Bus.port[2]
-[system.cpu.dcache.protocol]
-type=CoherenceProtocol
-do_upgrades=true
-protocol=moesi
-
[system.cpu.dtb]
-type=AlphaDTB
+type=AlphaTLB
size=64
[system.cpu.icache]
type=BaseCache
-children=protocol
-adaptive_compression=false
+addr_range=0:18446744073709551615
assoc=1
block_size=64
-compressed_bus=false
-compression_latency=0
+forward_snoops=true
hash_delay=1
+is_top_level=true
latency=1000
-lifo=false
max_miss_count=0
mshrs=4
-prefetch_access=false
-prefetch_cache_check_push=true
+num_cpus=1
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=10000
-prefetch_miss=false
+prefetch_on_access=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
-protocol=system.cpu.icache.protocol
repl=Null
size=32768
-split=false
-split_size=0
-store_compressed=false
subblock_size=0
tgts_per_mshr=8
trace_addr=0
cpu_side=system.cpu.icache_port
mem_side=system.toL2Bus.port[1]
-[system.cpu.icache.protocol]
-type=CoherenceProtocol
-do_upgrades=true
-protocol=moesi
+[system.cpu.interrupts]
+type=AlphaInterrupts
[system.cpu.itb]
-type=AlphaITB
+type=AlphaTLB
size=48
+[system.cpu.tracer]
+type=ExeTracer
+
[system.disk0]
type=IdeDisk
children=image
type=CowDiskImage
children=child
child=system.disk0.image.child
+image_file=
read_only=false
table_size=65536
type=CowDiskImage
children=child
child=system.disk2.image.child
+image_file=
read_only=false
table_size=65536
block_size=64
bus_id=0
clock=1000
-responder_set=true
+header_cycles=1
+use_default_range=true
width=64
default=system.tsunami.pciconfig.pio
-port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.console.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
+port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side
+
+[system.iocache]
+type=BaseCache
+addr_range=0:8589934591
+assoc=8
+block_size=64
+forward_snoops=false
+hash_delay=1
+is_top_level=true
+latency=50000
+max_miss_count=0
+mshrs=20
+num_cpus=1
+prefetch_data_accesses_only=false
+prefetch_degree=1
+prefetch_latency=500000
+prefetch_on_access=false
+prefetch_past_page=false
+prefetch_policy=none
+prefetch_serial_squash=false
+prefetch_use_cpu_id=true
+prefetcher_size=100
+prioritizeRequests=false
+repl=Null
+size=1024
+subblock_size=0
+tgts_per_mshr=12
+trace_addr=0
+two_queue=false
+write_buffers=8
+cpu_side=system.iobus.port[32]
+mem_side=system.membus.port[3]
[system.l2c]
type=BaseCache
-adaptive_compression=false
+addr_range=0:18446744073709551615
assoc=8
block_size=64
-compressed_bus=false
-compression_latency=0
+forward_snoops=true
hash_delay=1
+is_top_level=false
latency=10000
-lifo=false
max_miss_count=0
mshrs=92
-prefetch_access=false
-prefetch_cache_check_push=true
+num_cpus=1
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=100000
-prefetch_miss=false
+prefetch_on_access=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
-protocol=Null
repl=Null
size=4194304
-split=false
-split_size=0
-store_compressed=false
subblock_size=0
tgts_per_mshr=16
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.toL2Bus.port[0]
-mem_side=system.membus.port[2]
+mem_side=system.membus.port[4]
[system.membus]
type=Bus
-children=responder
+children=badaddr_responder
block_size=64
bus_id=1
clock=1000
-responder_set=false
+header_cycles=1
+use_default_range=false
width=64
-default=system.membus.responder.pio
-port=system.bridge.side_b system.physmem.port[0] system.l2c.mem_side
+default=system.membus.badaddr_responder.pio
+port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side
-[system.membus.responder]
+[system.membus.badaddr_responder]
type=IsaFake
+fake_mem=false
pio_addr=0
-pio_latency=1
+pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=true
[system.physmem]
type=PhysicalMemory
file=
-latency=1
+latency=30000
+latency_var=0
+null=false
range=0:134217727
zero=false
port=system.membus.port[1]
-[system.sim_console]
-type=SimConsole
-append_name=true
-intr_control=system.intrctrl
-number=0
-output=console
-port=3456
-
[system.simple_disk]
type=SimpleDisk
children=disk
image_file=/dist/m5/system/disks/linux-latest.img
read_only=true
+[system.terminal]
+type=Terminal
+intr_control=system.intrctrl
+number=0
+output=true
+port=3456
+
[system.toL2Bus]
type=Bus
-children=responder
block_size=64
bus_id=0
clock=1000
-responder_set=false
+header_cycles=1
+use_default_range=false
width=64
-default=system.toL2Bus.responder.pio
port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side
-[system.toL2Bus.responder]
-type=IsaFake
-pio_addr=0
-pio_latency=1
-pio_size=8
-platform=system.tsunami
-ret_bad_addr=true
-ret_data16=65535
-ret_data32=4294967295
-ret_data64=18446744073709551615
-ret_data8=255
-system=system
-update_data=false
-warn_access=
-pio=system.toL2Bus.default
-
[system.tsunami]
type=Tsunami
-children=cchip console etherint ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
intrctrl=system.intrctrl
system=system
-[system.tsunami.cchip]
-type=TsunamiCChip
-pio_addr=8803072344064
-pio_latency=1000
-platform=system.tsunami
-system=system
-tsunami=system.tsunami
-pio=system.iobus.port[1]
-
-[system.tsunami.console]
-type=AlphaConsole
+[system.tsunami.backdoor]
+type=AlphaBackdoor
cpu=system.cpu
disk=system.simple_disk
pio_addr=8804682956800
pio_latency=1000
platform=system.tsunami
-sim_console=system.sim_console
system=system
+terminal=system.terminal
pio=system.iobus.port[25]
-[system.tsunami.etherint]
-type=NSGigEInt
-device=system.tsunami.ethernet
-peer=Null
-
-[system.tsunami.ethernet]
-type=NSGigE
-children=configdata
-clock=0
-config_latency=20000
-configdata=system.tsunami.ethernet.configdata
-dma_data_free=false
-dma_desc_free=false
-dma_no_allocate=true
-dma_read_delay=0
-dma_read_factor=0
-dma_write_delay=0
-dma_write_factor=0
-hardware_address=00:90:00:00:00:01
-intr_delay=10000000
-max_backoff_delay=10000000
-min_backoff_delay=4000
-pci_bus=0
-pci_dev=1
-pci_func=0
+[system.tsunami.cchip]
+type=TsunamiCChip
+pio_addr=8803072344064
pio_latency=1000
platform=system.tsunami
-rss=false
-rx_delay=1000000
-rx_fifo_size=524288
-rx_filter=true
-rx_thread=false
system=system
-tx_delay=1000000
-tx_fifo_size=524288
-tx_thread=false
-config=system.iobus.port[28]
-dma=system.iobus.port[29]
-pio=system.iobus.port[27]
+tsunami=system.tsunami
+pio=system.iobus.port[1]
-[system.tsunami.ethernet.configdata]
-type=PciConfigData
+[system.tsunami.ethernet]
+type=NSGigE
BAR0=1
+BAR0LegacyIO=false
BAR0Size=256
BAR1=0
+BAR1LegacyIO=false
BAR1Size=4096
BAR2=0
+BAR2LegacyIO=false
BAR2Size=0
BAR3=0
+BAR3LegacyIO=false
BAR3Size=0
BAR4=0
+BAR4LegacyIO=false
BAR4Size=0
BAR5=0
+BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
SubsystemID=0
SubsystemVendorID=0
VendorID=4107
+clock=0
+config_latency=20000
+dma_data_free=false
+dma_desc_free=false
+dma_no_allocate=true
+dma_read_delay=0
+dma_read_factor=0
+dma_write_delay=0
+dma_write_factor=0
+hardware_address=00:90:00:00:00:01
+intr_delay=10000000
+max_backoff_delay=10000000
+min_backoff_delay=4000
+pci_bus=0
+pci_dev=1
+pci_func=0
+pio_latency=1000
+platform=system.tsunami
+rss=false
+rx_delay=1000000
+rx_fifo_size=524288
+rx_filter=true
+rx_thread=false
+system=system
+tx_delay=1000000
+tx_fifo_size=524288
+tx_thread=false
+config=system.iobus.port[30]
+dma=system.iobus.port[31]
+pio=system.iobus.port[29]
[system.tsunami.fake_OROM]
type=IsaFake
+fake_mem=false
pio_addr=8796093677568
pio_latency=1000
pio_size=393216
[system.tsunami.fake_ata0]
type=IsaFake
+fake_mem=false
pio_addr=8804615848432
pio_latency=1000
pio_size=8
[system.tsunami.fake_ata1]
type=IsaFake
+fake_mem=false
pio_addr=8804615848304
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_addr]
type=IsaFake
+fake_mem=false
pio_addr=8804615848569
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_read0]
type=IsaFake
+fake_mem=false
pio_addr=8804615848451
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_read1]
type=IsaFake
+fake_mem=false
pio_addr=8804615848515
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_read2]
type=IsaFake
+fake_mem=false
pio_addr=8804615848579
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_read3]
type=IsaFake
+fake_mem=false
pio_addr=8804615848643
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_read4]
type=IsaFake
+fake_mem=false
pio_addr=8804615848707
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_read5]
type=IsaFake
+fake_mem=false
pio_addr=8804615848771
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_read6]
type=IsaFake
+fake_mem=false
pio_addr=8804615848835
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_read7]
type=IsaFake
+fake_mem=false
pio_addr=8804615848899
pio_latency=1000
pio_size=8
[system.tsunami.fake_pnp_write]
type=IsaFake
+fake_mem=false
pio_addr=8804615850617
pio_latency=1000
pio_size=8
[system.tsunami.fake_ppc]
type=IsaFake
+fake_mem=false
pio_addr=8804615848891
pio_latency=1000
pio_size=8
[system.tsunami.fake_sm_chip]
type=IsaFake
+fake_mem=false
pio_addr=8804615848816
pio_latency=1000
pio_size=8
[system.tsunami.fake_uart1]
type=IsaFake
+fake_mem=false
pio_addr=8804615848696
pio_latency=1000
pio_size=8
[system.tsunami.fake_uart2]
type=IsaFake
+fake_mem=false
pio_addr=8804615848936
pio_latency=1000
pio_size=8
[system.tsunami.fake_uart3]
type=IsaFake
+fake_mem=false
pio_addr=8804615848680
pio_latency=1000
pio_size=8
[system.tsunami.fake_uart4]
type=IsaFake
+fake_mem=false
pio_addr=8804615848944
pio_latency=1000
pio_size=8
[system.tsunami.ide]
type=IdeController
-children=configdata
-config_latency=20000
-configdata=system.tsunami.ide.configdata
-disks=system.disk0 system.disk2
-max_backoff_delay=10000000
-min_backoff_delay=4000
-pci_bus=0
-pci_dev=0
-pci_func=0
-pio_latency=1000
-platform=system.tsunami
-system=system
-config=system.iobus.port[30]
-dma=system.iobus.port[31]
-pio=system.iobus.port[26]
-
-[system.tsunami.ide.configdata]
-type=PciConfigData
BAR0=1
+BAR0LegacyIO=false
BAR0Size=8
BAR1=1
+BAR1LegacyIO=false
BAR1Size=4
BAR2=1
+BAR2LegacyIO=false
BAR2Size=8
BAR3=1
+BAR3LegacyIO=false
BAR3Size=4
BAR4=1
+BAR4LegacyIO=false
BAR4Size=16
BAR5=1
+BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
+config_latency=20000
+ctrl_offset=0
+disks=system.disk0 system.disk2
+io_shift=0
+max_backoff_delay=10000000
+min_backoff_delay=4000
+pci_bus=0
+pci_dev=0
+pci_func=0
+pio_latency=1000
+platform=system.tsunami
+system=system
+config=system.iobus.port[27]
+dma=system.iobus.port[28]
+pio=system.iobus.port[26]
[system.tsunami.io]
type=TsunamiIO
pio_latency=1000
platform=system.tsunami
system=system
-time=2009 1 1 0 0 0 3 1
+time=Thu Jan 1 00:00:00 2009
tsunami=system.tsunami
year_is_bcd=false
pio=system.iobus.port[23]
pio_addr=8804615848952
pio_latency=1000
platform=system.tsunami
-sim_console=system.sim_console
system=system
+terminal=system.terminal
pio=system.iobus.port[24]