base: Use STL C++11 random number generation

[gem5.git] / tests / quick / se / 00.hello / ref / alpha / linux / inorder-timing / config.ini

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini
index b17544f09dffda35571ddec3cd018dd9203c6a8a..24e61bda7c495f8e70157c6a362ba33e2cf7705d 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini
@@ -1,17 +1,31 @@
 [root]
 type=Root
 children=system
+eventq_index=0
+full_system=false
+sim_quantum=0
 time_sync_enable=false
 time_sync_period=100000000000
 time_sync_spin_threshold=100000000
 
 [system]
 type=System
-children=cpu membus physmem
-mem_mode=atomic
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
+boot_osflags=a
+cache_line_size=64
+clk_domain=system.clk_domain
+eventq_index=0
+init_param=0
+kernel=
+kernel_addr_check=true
+load_addr_mask=1099511627775
+load_offset=0
+mem_mode=timing
+mem_ranges=
 memories=system.physmem
 num_work_ids=16
-physmem=system.physmem
+readfile=
+symbolfile=
 work_begin_ckpt_count=0
 work_begin_cpu_id_exit=-1
 work_begin_exit_count=0
@@ -19,23 +33,25 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
-system_port=system.membus.port[0]
+system_port=system.membus.slave[0]
+
+[system.clk_domain]
+type=SrcClockDomain
+clock=1000
+domain_id=-1
+eventq_index=0
+init_perf_level=0
+voltage_domain=system.voltage_domain
 
 [system.cpu]
 type=InOrderCPU
-children=dcache dtb icache itb l2cache toL2Bus tracer workload
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
+children=branchPred dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
 activity=0
+branchPred=system.cpu.branchPred
 cachePorts=2
 checker=Null
-choiceCtrBits=2
-choicePredictorSize=8192
-clock=500
+clk_domain=system.cpu_clk_domain
 cpu_id=0
-dataMemPort=dcache_port
-defer_registration=false
 div16Latency=1
 div16RepeatRate=1
 div24Latency=1
@@ -45,23 +61,16 @@ div32RepeatRate=1
 div8Latency=1
 div8RepeatRate=1
 do_checkpoint_insts=true
+do_quiesce=true
 do_statistics_insts=true
 dtb=system.cpu.dtb
+eventq_index=0
 fetchBuffSize=4
-fetchMemPort=icache_port
-functionTrace=false
-functionTraceStart=0
 function_trace=false
 function_trace_start=0
-globalCtrBits=2
-globalHistoryBits=13
-globalPredictorSize=8192
-instShiftAmt=2
+interrupts=system.cpu.interrupts
+isa=system.cpu.isa
 itb=system.cpu.itb
-localCtrBits=2
-localHistoryBits=11
-localHistoryTableSize=2048
-localPredictorSize=2048
 max_insts_all_threads=0
 max_insts_any_thread=0
 max_loads_all_threads=0
@@ -70,11 +79,13 @@ memBlockSize=64
 multLatency=1
 multRepeatRate=1
 numThreads=1
-phase=0
-predType=tournament
+profile=0
 progress_interval=0
+simpoint_start_insts=
+socket_id=0
 stageTracing=false
 stageWidth=4
+switched_out=false
 system=system
 threadModel=SMT
 tracer=system.cpu.tracer
@@ -82,122 +93,161 @@ workload=system.cpu.workload
 dcache_port=system.cpu.dcache.cpu_side
 icache_port=system.cpu.icache.cpu_side
 
+[system.cpu.branchPred]
+type=BranchPredictor
+BTBEntries=4096
+BTBTagSize=16
+RASSize=16
+choiceCtrBits=2
+choicePredictorSize=8192
+eventq_index=0
+globalCtrBits=2
+globalPredictorSize=8192
+instShiftAmt=2
+localCtrBits=2
+localHistoryTableSize=2048
+localPredictorSize=2048
+numThreads=1
+predType=tournament
+
 [system.cpu.dcache]
 type=BaseCache
-addr_range=0:18446744073709551615
+children=tags
+addr_ranges=0:18446744073709551615
 assoc=2
-block_size=64
+clk_domain=system.cpu_clk_domain
+eventq_index=0
 forward_snoops=true
-hash_delay=1
+hit_latency=2
 is_top_level=true
-latency=1000
 max_miss_count=0
-mshrs=10
-num_cpus=1
-prefetch_data_accesses_only=false
-prefetch_degree=1
-prefetch_latency=10000
+mshrs=4
 prefetch_on_access=false
-prefetch_past_page=false
-prefetch_policy=none
-prefetch_serial_squash=false
-prefetch_use_cpu_id=true
-prefetcher_size=100
-prioritizeRequests=false
-repl=Null
+prefetcher=Null
+response_latency=2
+sequential_access=false
 size=262144
-subblock_size=0
-tgts_per_mshr=5
-trace_addr=0
+system=system
+tags=system.cpu.dcache.tags
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.port[1]
+mem_side=system.cpu.toL2Bus.slave[1]
+
+[system.cpu.dcache.tags]
+type=LRU
+assoc=2
+block_size=64
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+hit_latency=2
+sequential_access=false
+size=262144
 
 [system.cpu.dtb]
 type=AlphaTLB
+eventq_index=0
 size=64
 
 [system.cpu.icache]
 type=BaseCache
-addr_range=0:18446744073709551615
+children=tags
+addr_ranges=0:18446744073709551615
 assoc=2
-block_size=64
+clk_domain=system.cpu_clk_domain
+eventq_index=0
 forward_snoops=true
-hash_delay=1
+hit_latency=2
 is_top_level=true
-latency=1000
 max_miss_count=0
-mshrs=10
-num_cpus=1
-prefetch_data_accesses_only=false
-prefetch_degree=1
-prefetch_latency=10000
+mshrs=4
 prefetch_on_access=false
-prefetch_past_page=false
-prefetch_policy=none
-prefetch_serial_squash=false
-prefetch_use_cpu_id=true
-prefetcher_size=100
-prioritizeRequests=false
-repl=Null
+prefetcher=Null
+response_latency=2
+sequential_access=false
 size=131072
-subblock_size=0
-tgts_per_mshr=5
-trace_addr=0
+system=system
+tags=system.cpu.icache.tags
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.port[0]
+mem_side=system.cpu.toL2Bus.slave[0]
+
+[system.cpu.icache.tags]
+type=LRU
+assoc=2
+block_size=64
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+hit_latency=2
+sequential_access=false
+size=131072
+
+[system.cpu.interrupts]
+type=AlphaInterrupts
+eventq_index=0
+
+[system.cpu.isa]
+type=AlphaISA
+eventq_index=0
+system=system
 
 [system.cpu.itb]
 type=AlphaTLB
+eventq_index=0
 size=48
 
 [system.cpu.l2cache]
 type=BaseCache
-addr_range=0:18446744073709551615
-assoc=2
-block_size=64
+children=tags
+addr_ranges=0:18446744073709551615
+assoc=8
+clk_domain=system.cpu_clk_domain
+eventq_index=0
 forward_snoops=true
-hash_delay=1
+hit_latency=20
 is_top_level=false
-latency=10000
 max_miss_count=0
-mshrs=10
-num_cpus=1
-prefetch_data_accesses_only=false
-prefetch_degree=1
-prefetch_latency=100000
+mshrs=20
 prefetch_on_access=false
-prefetch_past_page=false
-prefetch_policy=none
-prefetch_serial_squash=false
-prefetch_use_cpu_id=true
-prefetcher_size=100
-prioritizeRequests=false
-repl=Null
+prefetcher=Null
+response_latency=20
+sequential_access=false
 size=2097152
-subblock_size=0
-tgts_per_mshr=5
-trace_addr=0
+system=system
+tags=system.cpu.l2cache.tags
+tgts_per_mshr=12
 two_queue=false
 write_buffers=8
-cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[2]
+cpu_side=system.cpu.toL2Bus.master[0]
+mem_side=system.membus.slave[1]
 
-[system.cpu.toL2Bus]
-type=Bus
+[system.cpu.l2cache.tags]
+type=LRU
+assoc=8
 block_size=64
-bus_id=0
-clock=1000
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+hit_latency=20
+sequential_access=false
+size=2097152
+
+[system.cpu.toL2Bus]
+type=CoherentBus
+clk_domain=system.cpu_clk_domain
+eventq_index=0
 header_cycles=1
+system=system
 use_default_range=false
-width=64
-port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
+width=32
+master=system.cpu.l2cache.cpu_side
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
 
 [system.cpu.tracer]
 type=ExeTracer
+eventq_index=0
 
 [system.cpu.workload]
 type=LiveProcess
@@ -207,7 +257,8 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
+eventq_index=0
+executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -218,23 +269,78 @@ simpoint=0
 system=system
 uid=100
 
+[system.cpu_clk_domain]
+type=SrcClockDomain
+clock=500
+domain_id=-1
+eventq_index=0
+init_perf_level=0
+voltage_domain=system.voltage_domain
+
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
 [system.membus]
-type=Bus
-block_size=64
-bus_id=0
-clock=1000
+type=CoherentBus
+clk_domain=system.clk_domain
+eventq_index=0
 header_cycles=1
+system=system
 use_default_range=false
-width=64
-port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
+width=8
+master=system.physmem.port
+slave=system.system_port system.cpu.l2cache.mem_side
 
 [system.physmem]
-type=PhysicalMemory
-file=
-latency=30000
-latency_var=0
+type=DRAMCtrl
+activation_limit=4
+addr_mapping=RoRaBaChCo
+banks_per_rank=8
+burst_length=8
+channels=1
+clk_domain=system.clk_domain
+conf_table_reported=true
+device_bus_width=8
+device_rowbuffer_size=1024
+devices_per_rank=8
+eventq_index=0
+in_addr_map=true
+max_accesses_per_row=16
+mem_sched_policy=frfcfs
+min_writes_per_switch=16
 null=false
+page_policy=open_adaptive
 range=0:134217727
-zero=false
-port=system.membus.port[1]
+ranks_per_channel=2
+read_buffer_size=32
+static_backend_latency=10000
+static_frontend_latency=10000
+tBURST=5000
+tCK=1250
+tCL=13750
+tRAS=35000
+tRCD=13750
+tREFI=7800000
+tRFC=260000
+tRP=13750
+tRRD=6000
+tRTP=7500
+tRTW=2500
+tWR=15000
+tWTR=7500
+tXAW=30000
+write_buffer_size=64
+write_high_thresh_perc=85
+write_low_thresh_perc=50
+port=system.membus.master[0]
+
+[system.voltage_domain]
+type=VoltageDomain
+eventq_index=0
+voltage=1.000000