---------- Begin Simulation Statistics ----------
-sim_seconds 0.000144 # Number of seconds simulated
-sim_ticks 143853 # Number of ticks simulated
-final_tick 143853 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 0.000112 # Number of seconds simulated
+sim_ticks 112490 # Number of ticks simulated
+final_tick 112490 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 31570 # Simulator instruction rate (inst/s)
-host_op_rate 31567 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 710572 # Simulator tick rate (ticks/s)
-host_mem_usage 153096 # Number of bytes of host memory used
-host_seconds 0.20 # Real time elapsed on the host
-sim_insts 6390 # Number of instructions simulated
-sim_ops 6390 # Number of ops (including micro ops) simulated
-system.ruby.l1_cntrl0.cacheMemory.demand_hits 6718 # Number of cache demand hits
-system.ruby.l1_cntrl0.cacheMemory.demand_misses 1730 # Number of cache demand misses
-system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8448 # Number of cache demand accesses
+host_inst_rate 109524 # Simulator instruction rate (inst/s)
+host_op_rate 109501 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1923375 # Simulator tick rate (ticks/s)
+host_mem_usage 415960 # Number of bytes of host memory used
+host_seconds 0.06 # Real time elapsed on the host
+sim_insts 6403 # Number of instructions simulated
+sim_ops 6403 # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage 1 # Voltage in Volts
+system.clk_domain.clock 1 # Clock period in ticks
+system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.mem_ctrls.bytes_read::ruby.dir_cntrl0 110784 # Number of bytes read from this memory
+system.mem_ctrls.bytes_read::total 110784 # Number of bytes read from this memory
+system.mem_ctrls.bytes_written::ruby.dir_cntrl0 110528 # Number of bytes written to this memory
+system.mem_ctrls.bytes_written::total 110528 # Number of bytes written to this memory
+system.mem_ctrls.num_reads::ruby.dir_cntrl0 1731 # Number of read requests responded to by this memory
+system.mem_ctrls.num_reads::total 1731 # Number of read requests responded to by this memory
+system.mem_ctrls.num_writes::ruby.dir_cntrl0 1727 # Number of write requests responded to by this memory
+system.mem_ctrls.num_writes::total 1727 # Number of write requests responded to by this memory
+system.mem_ctrls.bw_read::ruby.dir_cntrl0 984834207 # Total read bandwidth from this memory (bytes/s)
+system.mem_ctrls.bw_read::total 984834207 # Total read bandwidth from this memory (bytes/s)
+system.mem_ctrls.bw_write::ruby.dir_cntrl0 982558450 # Write bandwidth from this memory (bytes/s)
+system.mem_ctrls.bw_write::total 982558450 # Write bandwidth from this memory (bytes/s)
+system.mem_ctrls.bw_total::ruby.dir_cntrl0 1967392657 # Total bandwidth to/from this memory (bytes/s)
+system.mem_ctrls.bw_total::total 1967392657 # Total bandwidth to/from this memory (bytes/s)
+system.mem_ctrls.readReqs 1731 # Number of read requests accepted
+system.mem_ctrls.writeReqs 1727 # Number of write requests accepted
+system.mem_ctrls.readBursts 1731 # Number of DRAM read bursts, including those serviced by the write queue
+system.mem_ctrls.writeBursts 1727 # Number of DRAM write bursts, including those merged in the write queue
+system.mem_ctrls.bytesReadDRAM 56704 # Total number of bytes read from DRAM
+system.mem_ctrls.bytesReadWrQ 54080 # Total number of bytes read from write queue
+system.mem_ctrls.bytesWritten 57088 # Total number of bytes written to DRAM
+system.mem_ctrls.bytesReadSys 110784 # Total read bytes from the system interface side
+system.mem_ctrls.bytesWrittenSys 110528 # Total written bytes from the system interface side
+system.mem_ctrls.servicedByWrQ 845 # Number of DRAM read bursts serviced by the write queue
+system.mem_ctrls.mergedWrBursts 803 # Number of DRAM write bursts merged with an existing one
+system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
+system.mem_ctrls.perBankRdBursts::0 83 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::1 50 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::2 70 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::3 63 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::4 108 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::5 23 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::6 1 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::7 3 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::8 0 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::9 1 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::10 55 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::11 36 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::12 18 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::13 270 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::14 81 # Per bank write bursts
+system.mem_ctrls.perBankRdBursts::15 24 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::0 82 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::1 51 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::2 73 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::3 60 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::4 126 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::5 27 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::6 1 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::7 3 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::9 1 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::10 50 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::11 33 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::12 12 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::13 268 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::14 81 # Per bank write bursts
+system.mem_ctrls.perBankWrBursts::15 24 # Per bank write bursts
+system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
+system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
+system.mem_ctrls.totGap 112412 # Total gap between requests
+system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
+system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
+system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
+system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
+system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
+system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
+system.mem_ctrls.readPktSize::6 1731 # Read request sizes (log2)
+system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
+system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
+system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
+system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
+system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
+system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
+system.mem_ctrls.writePktSize::6 1727 # Write request sizes (log2)
+system.mem_ctrls.rdQLenPdf::0 886 # What read queue length does an incoming req see
+system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see
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+system.mem_ctrls.wrQLenPdf::15 6 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::16 6 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::17 51 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::18 57 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::19 57 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::20 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::21 60 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::22 57 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::23 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::24 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::25 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::26 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::27 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::28 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::29 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::30 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::31 56 # What write queue length does an incoming req see
+system.mem_ctrls.wrQLenPdf::32 55 # What write queue length does an incoming req see
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+system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
+system.mem_ctrls.bytesPerActivate::samples 264 # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::mean 424 # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::gmean 260.079273 # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::stdev 372.426347 # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::0-127 66 25.00% 25.00% # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::128-255 58 21.97% 46.97% # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::256-383 27 10.23% 57.20% # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::384-511 16 6.06% 63.26% # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::512-639 17 6.44% 69.70% # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::640-767 8 3.03% 72.73% # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::768-895 12 4.55% 77.27% # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::896-1023 10 3.79% 81.06% # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::1024-1151 50 18.94% 100.00% # Bytes accessed per row activation
+system.mem_ctrls.bytesPerActivate::total 264 # Bytes accessed per row activation
+system.mem_ctrls.rdPerTurnAround::samples 55 # Reads before turning the bus around for writes
+system.mem_ctrls.rdPerTurnAround::mean 15.818182 # Reads before turning the bus around for writes
+system.mem_ctrls.rdPerTurnAround::gmean 15.638991 # Reads before turning the bus around for writes
+system.mem_ctrls.rdPerTurnAround::stdev 2.938196 # Reads before turning the bus around for writes
+system.mem_ctrls.rdPerTurnAround::12-13 3 5.45% 5.45% # Reads before turning the bus around for writes
+system.mem_ctrls.rdPerTurnAround::14-15 24 43.64% 49.09% # Reads before turning the bus around for writes
+system.mem_ctrls.rdPerTurnAround::16-17 23 41.82% 90.91% # Reads before turning the bus around for writes
+system.mem_ctrls.rdPerTurnAround::18-19 4 7.27% 98.18% # Reads before turning the bus around for writes
+system.mem_ctrls.rdPerTurnAround::34-35 1 1.82% 100.00% # Reads before turning the bus around for writes
+system.mem_ctrls.rdPerTurnAround::total 55 # Reads before turning the bus around for writes
+system.mem_ctrls.wrPerTurnAround::samples 55 # Writes before turning the bus around for reads
+system.mem_ctrls.wrPerTurnAround::mean 16.218182 # Writes before turning the bus around for reads
+system.mem_ctrls.wrPerTurnAround::gmean 16.206001 # Writes before turning the bus around for reads
+system.mem_ctrls.wrPerTurnAround::stdev 0.658025 # Writes before turning the bus around for reads
+system.mem_ctrls.wrPerTurnAround::16 49 89.09% 89.09% # Writes before turning the bus around for reads
+system.mem_ctrls.wrPerTurnAround::17 1 1.82% 90.91% # Writes before turning the bus around for reads
+system.mem_ctrls.wrPerTurnAround::18 4 7.27% 98.18% # Writes before turning the bus around for reads
+system.mem_ctrls.wrPerTurnAround::19 1 1.82% 100.00% # Writes before turning the bus around for reads
+system.mem_ctrls.wrPerTurnAround::total 55 # Writes before turning the bus around for reads
+system.mem_ctrls.totQLat 16225 # Total ticks spent queuing
+system.mem_ctrls.totMemAccLat 33059 # Total ticks spent from burst creation until serviced by the DRAM
+system.mem_ctrls.totBusLat 4430 # Total ticks spent in databus transfers
+system.mem_ctrls.avgQLat 18.31 # Average queueing delay per DRAM burst
+system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
+system.mem_ctrls.avgMemAccLat 37.31 # Average memory access latency per DRAM burst
+system.mem_ctrls.avgRdBW 504.08 # Average DRAM read bandwidth in MiByte/s
+system.mem_ctrls.avgWrBW 507.49 # Average achieved write bandwidth in MiByte/s
+system.mem_ctrls.avgRdBWSys 984.83 # Average system read bandwidth in MiByte/s
+system.mem_ctrls.avgWrBWSys 982.56 # Average system write bandwidth in MiByte/s
+system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
+system.mem_ctrls.busUtil 7.90 # Data bus utilization in percentage
+system.mem_ctrls.busUtilRead 3.94 # Data bus utilization in percentage for reads
+system.mem_ctrls.busUtilWrite 3.96 # Data bus utilization in percentage for writes
+system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
+system.mem_ctrls.avgWrQLen 26.10 # Average write queue length when enqueuing
+system.mem_ctrls.readRowHits 674 # Number of row buffer hits during reads
+system.mem_ctrls.writeRowHits 833 # Number of row buffer hits during writes
+system.mem_ctrls.readRowHitRate 76.07 # Row buffer hit rate for reads
+system.mem_ctrls.writeRowHitRate 90.15 # Row buffer hit rate for writes
+system.mem_ctrls.avgGap 32.51 # Average gap between requests
+system.mem_ctrls.pageHitRate 83.26 # Row buffer hit rate, read and write combined
+system.mem_ctrls_0.actEnergy 735420 # Energy for activate commands per rank (pJ)
+system.mem_ctrls_0.preEnergy 386400 # Energy for precharge commands per rank (pJ)
+system.mem_ctrls_0.readEnergy 4581024 # Energy for read commands per rank (pJ)
+system.mem_ctrls_0.writeEnergy 3532896 # Energy for write commands per rank (pJ)
+system.mem_ctrls_0.refreshEnergy 8604960.000000 # Energy for refresh commands per rank (pJ)
+system.mem_ctrls_0.actBackEnergy 13923048 # Energy for active background per rank (pJ)
+system.mem_ctrls_0.preBackEnergy 195072 # Energy for precharge background per rank (pJ)
+system.mem_ctrls_0.actPowerDownEnergy 30921360 # Energy for active power-down per rank (pJ)
+system.mem_ctrls_0.prePowerDownEnergy 5237376 # Energy for precharge power-down per rank (pJ)
+system.mem_ctrls_0.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
+system.mem_ctrls_0.totalEnergy 68117556 # Total energy per rank (pJ)
+system.mem_ctrls_0.averagePower 605.543213 # Core power per rank (mW)
+system.mem_ctrls_0.totalIdleTime 81406 # Total Idle time Per DRAM Rank
+system.mem_ctrls_0.memoryStateTime::IDLE 88 # Time in different power states
+system.mem_ctrls_0.memoryStateTime::REF 3640 # Time in different power states
+system.mem_ctrls_0.memoryStateTime::SREF 0 # Time in different power states
+system.mem_ctrls_0.memoryStateTime::PRE_PDN 13639 # Time in different power states
+system.mem_ctrls_0.memoryStateTime::ACT 27313 # Time in different power states
+system.mem_ctrls_0.memoryStateTime::ACT_PDN 67810 # Time in different power states
+system.mem_ctrls_1.actEnergy 1199520 # Energy for activate commands per rank (pJ)
+system.mem_ctrls_1.preEnergy 633696 # Energy for precharge commands per rank (pJ)
+system.mem_ctrls_1.readEnergy 5540640 # Energy for read commands per rank (pJ)
+system.mem_ctrls_1.writeEnergy 3917088 # Energy for write commands per rank (pJ)
+system.mem_ctrls_1.refreshEnergy 8604960.000000 # Energy for refresh commands per rank (pJ)
+system.mem_ctrls_1.actBackEnergy 12524952 # Energy for active background per rank (pJ)
+system.mem_ctrls_1.preBackEnergy 314880 # Energy for precharge background per rank (pJ)
+system.mem_ctrls_1.actPowerDownEnergy 33139344 # Energy for active power-down per rank (pJ)
+system.mem_ctrls_1.prePowerDownEnergy 4427136 # Energy for precharge power-down per rank (pJ)
+system.mem_ctrls_1.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
+system.mem_ctrls_1.totalEnergy 70302216 # Total energy per rank (pJ)
+system.mem_ctrls_1.averagePower 624.964139 # Core power per rank (mW)
+system.mem_ctrls_1.totalIdleTime 83983 # Total Idle time Per DRAM Rank
+system.mem_ctrls_1.memoryStateTime::IDLE 260 # Time in different power states
+system.mem_ctrls_1.memoryStateTime::REF 3640 # Time in different power states
+system.mem_ctrls_1.memoryStateTime::SREF 0 # Time in different power states
+system.mem_ctrls_1.memoryStateTime::PRE_PDN 11529 # Time in different power states
+system.mem_ctrls_1.memoryStateTime::ACT 24387 # Time in different power states
+system.mem_ctrls_1.memoryStateTime::ACT_PDN 72674 # Time in different power states
+system.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.cpu.clk_domain.clock 1 # Clock period in ticks
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv
system.cpu.dtb.fetch_accesses 0 # ITB accesses
-system.cpu.dtb.read_hits 1183 # DTB read hits
+system.cpu.dtb.read_hits 1185 # DTB read hits
system.cpu.dtb.read_misses 7 # DTB read misses
system.cpu.dtb.read_acv 0 # DTB read access violations
-system.cpu.dtb.read_accesses 1190 # DTB read accesses
+system.cpu.dtb.read_accesses 1192 # DTB read accesses
system.cpu.dtb.write_hits 865 # DTB write hits
system.cpu.dtb.write_misses 3 # DTB write misses
system.cpu.dtb.write_acv 0 # DTB write access violations
system.cpu.dtb.write_accesses 868 # DTB write accesses
-system.cpu.dtb.data_hits 2048 # DTB hits
+system.cpu.dtb.data_hits 2050 # DTB hits
system.cpu.dtb.data_misses 10 # DTB misses
system.cpu.dtb.data_acv 0 # DTB access violations
-system.cpu.dtb.data_accesses 2058 # DTB accesses
-system.cpu.itb.fetch_hits 6401 # ITB hits
+system.cpu.dtb.data_accesses 2060 # DTB accesses
+system.cpu.itb.fetch_hits 6414 # ITB hits
system.cpu.itb.fetch_misses 17 # ITB misses
system.cpu.itb.fetch_acv 0 # ITB acv
-system.cpu.itb.fetch_accesses 6418 # ITB accesses
+system.cpu.itb.fetch_accesses 6431 # ITB accesses
system.cpu.itb.read_hits 0 # DTB read hits
system.cpu.itb.read_misses 0 # DTB read misses
system.cpu.itb.read_acv 0 # DTB read access violations
system.cpu.itb.data_misses 0 # DTB misses
system.cpu.itb.data_acv 0 # DTB access violations
system.cpu.itb.data_accesses 0 # DTB accesses
-system.cpu.workload.num_syscalls 17 # Number of system calls
-system.cpu.numCycles 143853 # number of cpu cycles simulated
+system.cpu.workload.numSyscalls 17 # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON 112490 # Cumulative time (in ticks) in various power states
+system.cpu.numCycles 112490 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.committedInsts 6390 # Number of instructions committed
-system.cpu.committedOps 6390 # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses 6317 # Number of integer alu accesses
+system.cpu.committedInsts 6403 # Number of instructions committed
+system.cpu.committedOps 6403 # Number of ops (including micro ops) committed
+system.cpu.num_int_alu_accesses 6329 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 10 # Number of float alu accesses
system.cpu.num_func_calls 251 # number of times a function call or return occured
-system.cpu.num_conditional_control_insts 749 # number of instructions that are conditional controls
-system.cpu.num_int_insts 6317 # number of integer instructions
+system.cpu.num_conditional_control_insts 754 # number of instructions that are conditional controls
+system.cpu.num_int_insts 6329 # number of integer instructions
system.cpu.num_fp_insts 10 # number of float instructions
-system.cpu.num_int_register_reads 8285 # number of times the integer registers were read
-system.cpu.num_int_register_writes 4568 # number of times the integer registers were written
+system.cpu.num_int_register_reads 8297 # number of times the integer registers were read
+system.cpu.num_int_register_writes 4575 # number of times the integer registers were written
system.cpu.num_fp_register_reads 8 # number of times the floating registers were read
system.cpu.num_fp_register_writes 2 # number of times the floating registers were written
-system.cpu.num_mem_refs 2058 # number of memory refs
-system.cpu.num_load_insts 1190 # Number of load instructions
+system.cpu.num_mem_refs 2060 # number of memory refs
+system.cpu.num_load_insts 1192 # Number of load instructions
system.cpu.num_store_insts 868 # Number of store instructions
system.cpu.num_idle_cycles 0 # Number of idle cycles
-system.cpu.num_busy_cycles 143853 # Number of busy cycles
+system.cpu.num_busy_cycles 112490 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.Branches 1056 # Number of branches fetched
+system.cpu.op_class::No_OpClass 19 0.30% 0.30% # Class of executed instruction
+system.cpu.op_class::IntAlu 4331 67.53% 67.83% # Class of executed instruction
+system.cpu.op_class::IntMult 1 0.02% 67.85% # Class of executed instruction
+system.cpu.op_class::IntDiv 0 0.00% 67.85% # Class of executed instruction
+system.cpu.op_class::FloatAdd 2 0.03% 67.88% # Class of executed instruction
+system.cpu.op_class::FloatCmp 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::FloatCvt 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::FloatMult 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::FloatMultAcc 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::FloatDiv 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::FloatMisc 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::FloatSqrt 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdAdd 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdAddAcc 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdAlu 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdCmp 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdCvt 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdMisc 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdMult 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdMultAcc 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdShift 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdShiftAcc 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdSqrt 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdFloatAdd 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdFloatAlu 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdFloatCmp 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdFloatCvt 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdFloatDiv 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdFloatMisc 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdFloatMult 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdFloatMultAcc 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::SimdFloatSqrt 0 0.00% 67.88% # Class of executed instruction
+system.cpu.op_class::MemRead 1191 18.57% 86.45% # Class of executed instruction
+system.cpu.op_class::MemWrite 861 13.43% 99.88% # Class of executed instruction
+system.cpu.op_class::FloatMemRead 1 0.02% 99.89% # Class of executed instruction
+system.cpu.op_class::FloatMemWrite 7 0.11% 100.00% # Class of executed instruction
+system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::total 6413 # Class of executed instruction
+system.ruby.clk_domain.clock 1 # Clock period in ticks
+system.ruby.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.ruby.delayHist::bucket_size 1 # delay histogram for all message
+system.ruby.delayHist::max_bucket 9 # delay histogram for all message
+system.ruby.delayHist::samples 3458 # delay histogram for all message
+system.ruby.delayHist | 3458 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
+system.ruby.delayHist::total 3458 # delay histogram for all message
+system.ruby.outstanding_req_hist_seqr::bucket_size 1
+system.ruby.outstanding_req_hist_seqr::max_bucket 9
+system.ruby.outstanding_req_hist_seqr::samples 8464
+system.ruby.outstanding_req_hist_seqr::mean 1
+system.ruby.outstanding_req_hist_seqr::gmean 1
+system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 8464 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.outstanding_req_hist_seqr::total 8464
+system.ruby.latency_hist_seqr::bucket_size 64
+system.ruby.latency_hist_seqr::max_bucket 639
+system.ruby.latency_hist_seqr::samples 8463
+system.ruby.latency_hist_seqr::mean 12.291977
+system.ruby.latency_hist_seqr::gmean 2.221869
+system.ruby.latency_hist_seqr::stdev 27.407806
+system.ruby.latency_hist_seqr | 7608 89.90% 89.90% | 798 9.43% 99.33% | 40 0.47% 99.80% | 5 0.06% 99.86% | 6 0.07% 99.93% | 6 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.latency_hist_seqr::total 8463
+system.ruby.hit_latency_hist_seqr::bucket_size 1
+system.ruby.hit_latency_hist_seqr::max_bucket 9
+system.ruby.hit_latency_hist_seqr::samples 6732
+system.ruby.hit_latency_hist_seqr::mean 1
+system.ruby.hit_latency_hist_seqr::gmean 1
+system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 6732 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.hit_latency_hist_seqr::total 6732
+system.ruby.miss_latency_hist_seqr::bucket_size 64
+system.ruby.miss_latency_hist_seqr::max_bucket 639
+system.ruby.miss_latency_hist_seqr::samples 1731
+system.ruby.miss_latency_hist_seqr::mean 56.207395
+system.ruby.miss_latency_hist_seqr::gmean 49.560362
+system.ruby.miss_latency_hist_seqr::stdev 35.333412
+system.ruby.miss_latency_hist_seqr | 876 50.61% 50.61% | 798 46.10% 96.71% | 40 2.31% 99.02% | 5 0.29% 99.31% | 6 0.35% 99.65% | 6 0.35% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.miss_latency_hist_seqr::total 1731
+system.ruby.Directory.incomplete_times_seqr 1730
+system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs 0.015352 # Average number of messages in buffer
+system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time 0.997813 # Average number of cycles messages are stalled in this MB
+system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs 0.030740 # Average number of messages in buffer
+system.ruby.dir_cntrl0.requestToDir.avg_stall_time 11.743091 # Average number of cycles messages are stalled in this MB
+system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs 0.015388 # Average number of messages in buffer
+system.ruby.dir_cntrl0.responseFromDir.avg_stall_time 0.999387 # Average number of cycles messages are stalled in this MB
+system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs 0.030740 # Average number of messages in buffer
+system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time 0.999396 # Average number of cycles messages are stalled in this MB
+system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.ruby.l1_cntrl0.cacheMemory.demand_hits 6732 # Number of cache demand hits
+system.ruby.l1_cntrl0.cacheMemory.demand_misses 1731 # Number of cache demand misses
+system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8463 # Number of cache demand accesses
+system.ruby.l1_cntrl0.forwardToCache.avg_buf_msgs 0.015352 # Average number of messages in buffer
+system.ruby.l1_cntrl0.forwardToCache.avg_stall_time 6.984319 # Average number of cycles messages are stalled in this MB
+system.ruby.l1_cntrl0.mandatoryQueue.avg_buf_msgs 0.075242 # Average number of messages in buffer
+system.ruby.l1_cntrl0.mandatoryQueue.avg_stall_time 0.999991 # Average number of cycles messages are stalled in this MB
+system.ruby.l1_cntrl0.requestFromCache.avg_buf_msgs 0.061480 # Average number of messages in buffer
+system.ruby.l1_cntrl0.requestFromCache.avg_stall_time 1.999947 # Average number of cycles messages are stalled in this MB
+system.ruby.l1_cntrl0.responseToCache.avg_buf_msgs 0.015388 # Average number of messages in buffer
+system.ruby.l1_cntrl0.responseToCache.avg_stall_time 6.995333 # Average number of cycles messages are stalled in this MB
+system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
+system.ruby.network.routers0.port_buffers03.avg_buf_msgs 0.015352 # Average number of messages in buffer
+system.ruby.network.routers0.port_buffers03.avg_stall_time 5.986612 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers0.port_buffers04.avg_buf_msgs 0.015388 # Average number of messages in buffer
+system.ruby.network.routers0.port_buffers04.avg_stall_time 5.996053 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers0.port_buffers07.avg_buf_msgs 0.092150 # Average number of messages in buffer
+system.ruby.network.routers0.port_buffers07.avg_stall_time 6.743802 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.ruby.network.routers0.percent_links_utilized 7.685128
+system.ruby.network.routers0.msg_count.Control::2 1731
+system.ruby.network.routers0.msg_count.Data::2 1727
+system.ruby.network.routers0.msg_count.Response_Data::4 1731
+system.ruby.network.routers0.msg_count.Writeback_Control::3 1727
+system.ruby.network.routers0.msg_bytes.Control::2 13848
+system.ruby.network.routers0.msg_bytes.Data::2 124344
+system.ruby.network.routers0.msg_bytes.Response_Data::4 124632
+system.ruby.network.routers0.msg_bytes.Writeback_Control::3 13816
+system.ruby.network.routers1.port_buffers02.avg_buf_msgs 0.030740 # Average number of messages in buffer
+system.ruby.network.routers1.port_buffers02.avg_stall_time 10.743268 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers1.port_buffers06.avg_buf_msgs 0.015352 # Average number of messages in buffer
+system.ruby.network.routers1.port_buffers06.avg_stall_time 1.995609 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers1.port_buffers07.avg_buf_msgs 0.015388 # Average number of messages in buffer
+system.ruby.network.routers1.port_buffers07.avg_stall_time 1.998755 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.ruby.network.routers1.percent_links_utilized 7.685128
+system.ruby.network.routers1.msg_count.Control::2 1731
+system.ruby.network.routers1.msg_count.Data::2 1727
+system.ruby.network.routers1.msg_count.Response_Data::4 1731
+system.ruby.network.routers1.msg_count.Writeback_Control::3 1727
+system.ruby.network.routers1.msg_bytes.Control::2 13848
+system.ruby.network.routers1.msg_bytes.Data::2 124344
+system.ruby.network.routers1.msg_bytes.Response_Data::4 124632
+system.ruby.network.routers1.msg_bytes.Writeback_Control::3 13816
+system.ruby.network.int_link_buffers02.avg_buf_msgs 0.030740 # Average number of messages in buffer
+system.ruby.network.int_link_buffers02.avg_stall_time 7.743695 # Average number of cycles messages are stalled in this MB
+system.ruby.network.int_link_buffers08.avg_buf_msgs 0.015352 # Average number of messages in buffer
+system.ruby.network.int_link_buffers08.avg_stall_time 2.993386 # Average number of cycles messages are stalled in this MB
+system.ruby.network.int_link_buffers09.avg_buf_msgs 0.015388 # Average number of messages in buffer
+system.ruby.network.int_link_buffers09.avg_stall_time 2.998107 # Average number of cycles messages are stalled in this MB
+system.ruby.network.int_link_buffers13.avg_buf_msgs 0.015352 # Average number of messages in buffer
+system.ruby.network.int_link_buffers13.avg_stall_time 4.988888 # Average number of cycles messages are stalled in this MB
+system.ruby.network.int_link_buffers14.avg_buf_msgs 0.015388 # Average number of messages in buffer
+system.ruby.network.int_link_buffers14.avg_stall_time 4.996755 # Average number of cycles messages are stalled in this MB
+system.ruby.network.int_link_buffers17.avg_buf_msgs 0.030740 # Average number of messages in buffer
+system.ruby.network.int_link_buffers17.avg_stall_time 9.743428 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers2.port_buffers03.avg_buf_msgs 0.015352 # Average number of messages in buffer
+system.ruby.network.routers2.port_buffers03.avg_stall_time 3.991146 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers2.port_buffers04.avg_buf_msgs 0.015388 # Average number of messages in buffer
+system.ruby.network.routers2.port_buffers04.avg_stall_time 3.997440 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers2.port_buffers07.avg_buf_msgs 0.030740 # Average number of messages in buffer
+system.ruby.network.routers2.port_buffers07.avg_stall_time 8.743571 # Average number of cycles messages are stalled in this MB
+system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.ruby.network.routers2.percent_links_utilized 7.685128
+system.ruby.network.routers2.msg_count.Control::2 1731
+system.ruby.network.routers2.msg_count.Data::2 1727
+system.ruby.network.routers2.msg_count.Response_Data::4 1731
+system.ruby.network.routers2.msg_count.Writeback_Control::3 1727
+system.ruby.network.routers2.msg_bytes.Control::2 13848
+system.ruby.network.routers2.msg_bytes.Data::2 124344
+system.ruby.network.routers2.msg_bytes.Response_Data::4 124632
+system.ruby.network.routers2.msg_bytes.Writeback_Control::3 13816
+system.ruby.network.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.ruby.network.msg_count.Control 5193
+system.ruby.network.msg_count.Data 5181
+system.ruby.network.msg_count.Response_Data 5193
+system.ruby.network.msg_count.Writeback_Control 5181
+system.ruby.network.msg_byte.Control 41544
+system.ruby.network.msg_byte.Data 373032
+system.ruby.network.msg_byte.Response_Data 373896
+system.ruby.network.msg_byte.Writeback_Control 41448
+system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
+system.ruby.network.routers0.throttle0.link_utilization 7.692239
+system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1731
+system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1727
+system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 124632
+system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 13816
+system.ruby.network.routers0.throttle1.link_utilization 7.678016
+system.ruby.network.routers0.throttle1.msg_count.Control::2 1731
+system.ruby.network.routers0.throttle1.msg_count.Data::2 1727
+system.ruby.network.routers0.throttle1.msg_bytes.Control::2 13848
+system.ruby.network.routers0.throttle1.msg_bytes.Data::2 124344
+system.ruby.network.routers1.throttle0.link_utilization 7.678016
+system.ruby.network.routers1.throttle0.msg_count.Control::2 1731
+system.ruby.network.routers1.throttle0.msg_count.Data::2 1727
+system.ruby.network.routers1.throttle0.msg_bytes.Control::2 13848
+system.ruby.network.routers1.throttle0.msg_bytes.Data::2 124344
+system.ruby.network.routers1.throttle1.link_utilization 7.692239
+system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1731
+system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1727
+system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 124632
+system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 13816
+system.ruby.network.routers2.throttle0.link_utilization 7.692239
+system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1731
+system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1727
+system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 124632
+system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 13816
+system.ruby.network.routers2.throttle1.link_utilization 7.678016
+system.ruby.network.routers2.throttle1.msg_count.Control::2 1731
+system.ruby.network.routers2.throttle1.msg_count.Data::2 1727
+system.ruby.network.routers2.throttle1.msg_bytes.Control::2 13848
+system.ruby.network.routers2.throttle1.msg_bytes.Data::2 124344
+system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1
+system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1
+system.ruby.delayVCHist.vnet_1::samples 1731 # delay histogram for vnet_1
+system.ruby.delayVCHist.vnet_1 | 1731 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1
+system.ruby.delayVCHist.vnet_1::total 1731 # delay histogram for vnet_1
+system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2
+system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2
+system.ruby.delayVCHist.vnet_2::samples 1727 # delay histogram for vnet_2
+system.ruby.delayVCHist.vnet_2 | 1727 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2
+system.ruby.delayVCHist.vnet_2::total 1727 # delay histogram for vnet_2
+system.ruby.LD.latency_hist_seqr::bucket_size 64
+system.ruby.LD.latency_hist_seqr::max_bucket 639
+system.ruby.LD.latency_hist_seqr::samples 1185
+system.ruby.LD.latency_hist_seqr::mean 33.356118
+system.ruby.LD.latency_hist_seqr::gmean 10.708915
+system.ruby.LD.latency_hist_seqr::stdev 36.387225
+system.ruby.LD.latency_hist_seqr | 862 72.74% 72.74% | 301 25.40% 98.14% | 16 1.35% 99.49% | 3 0.25% 99.75% | 1 0.08% 99.83% | 2 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.LD.latency_hist_seqr::total 1185
+system.ruby.LD.hit_latency_hist_seqr::bucket_size 1
+system.ruby.LD.hit_latency_hist_seqr::max_bucket 9
+system.ruby.LD.hit_latency_hist_seqr::samples 457
+system.ruby.LD.hit_latency_hist_seqr::mean 1
+system.ruby.LD.hit_latency_hist_seqr::gmean 1
+system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 457 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.LD.hit_latency_hist_seqr::total 457
+system.ruby.LD.miss_latency_hist_seqr::bucket_size 64
+system.ruby.LD.miss_latency_hist_seqr::max_bucket 639
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+system.ruby.LD.miss_latency_hist_seqr::gmean 47.442261
+system.ruby.LD.miss_latency_hist_seqr::stdev 32.940895
+system.ruby.LD.miss_latency_hist_seqr | 405 55.63% 55.63% | 301 41.35% 96.98% | 16 2.20% 99.18% | 3 0.41% 99.59% | 1 0.14% 99.73% | 2 0.27% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.LD.miss_latency_hist_seqr::total 728
+system.ruby.ST.latency_hist_seqr::bucket_size 32
+system.ruby.ST.latency_hist_seqr::max_bucket 319
+system.ruby.ST.latency_hist_seqr::samples 865
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+system.ruby.ST.latency_hist_seqr::gmean 3.361529
+system.ruby.ST.latency_hist_seqr::stdev 31.340829
+system.ruby.ST.latency_hist_seqr | 592 68.44% 68.44% | 160 18.50% 86.94% | 102 11.79% 98.73% | 0 0.00% 98.73% | 4 0.46% 99.19% | 4 0.46% 99.65% | 1 0.12% 99.77% | 0 0.00% 99.77% | 1 0.12% 99.88% | 1 0.12% 100.00%
+system.ruby.ST.latency_hist_seqr::total 865
+system.ruby.ST.hit_latency_hist_seqr::bucket_size 1
+system.ruby.ST.hit_latency_hist_seqr::max_bucket 9
+system.ruby.ST.hit_latency_hist_seqr::samples 592
+system.ruby.ST.hit_latency_hist_seqr::mean 1
+system.ruby.ST.hit_latency_hist_seqr::gmean 1
+system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 592 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.ST.hit_latency_hist_seqr::total 592
+system.ruby.ST.miss_latency_hist_seqr::bucket_size 32
+system.ruby.ST.miss_latency_hist_seqr::max_bucket 319
+system.ruby.ST.miss_latency_hist_seqr::samples 273
+system.ruby.ST.miss_latency_hist_seqr::mean 53.216117
+system.ruby.ST.miss_latency_hist_seqr::gmean 46.594106
+system.ruby.ST.miss_latency_hist_seqr::stdev 35.315815
+system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 160 58.61% 58.61% | 102 37.36% 95.97% | 0 0.00% 95.97% | 4 1.47% 97.44% | 4 1.47% 98.90% | 1 0.37% 99.27% | 0 0.00% 99.27% | 1 0.37% 99.63% | 1 0.37% 100.00%
+system.ruby.ST.miss_latency_hist_seqr::total 273
+system.ruby.IFETCH.latency_hist_seqr::bucket_size 64
+system.ruby.IFETCH.latency_hist_seqr::max_bucket 639
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+system.ruby.IFETCH.latency_hist_seqr::mean 7.699984
+system.ruby.IFETCH.latency_hist_seqr::gmean 1.571280
+system.ruby.IFETCH.latency_hist_seqr::stdev 22.534194
+system.ruby.IFETCH.latency_hist_seqr | 5994 93.47% 93.47% | 395 6.16% 99.63% | 16 0.25% 99.88% | 1 0.02% 99.89% | 3 0.05% 99.94% | 4 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.IFETCH.latency_hist_seqr::total 6413
+system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1
+system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9
+system.ruby.IFETCH.hit_latency_hist_seqr::samples 5683
+system.ruby.IFETCH.hit_latency_hist_seqr::mean 1
+system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1
+system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 5683 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.IFETCH.hit_latency_hist_seqr::total 5683
+system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64
+system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639
+system.ruby.IFETCH.miss_latency_hist_seqr::samples 730
+system.ruby.IFETCH.miss_latency_hist_seqr::mean 59.858904
+system.ruby.IFETCH.miss_latency_hist_seqr::gmean 52.975537
+system.ruby.IFETCH.miss_latency_hist_seqr::stdev 37.310775
+system.ruby.IFETCH.miss_latency_hist_seqr | 311 42.60% 42.60% | 395 54.11% 96.71% | 16 2.19% 98.90% | 1 0.14% 99.04% | 3 0.41% 99.45% | 4 0.55% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.IFETCH.miss_latency_hist_seqr::total 730
+system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64
+system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639
+system.ruby.Directory.miss_mach_latency_hist_seqr::samples 1731
+system.ruby.Directory.miss_mach_latency_hist_seqr::mean 56.207395
+system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 49.560362
+system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 35.333412
+system.ruby.Directory.miss_mach_latency_hist_seqr | 876 50.61% 50.61% | 798 46.10% 96.71% | 40 2.31% 99.02% | 5 0.29% 99.31% | 6 0.35% 99.65% | 6 0.35% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.Directory.miss_mach_latency_hist_seqr::total 1731
+system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1
+system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9
+system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1
+system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan
+system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1
+system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1
+system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket 9
+system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples 1
+system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev nan
+system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total 1
+system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size 1
+system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket 9
+system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples 1
+system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev nan
+system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total 1
+system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size 8
+system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket 79
+system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples 1
+system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75
+system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000
+system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan
+system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00%
+system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1
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+system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 47.442261
+system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 32.940895
+system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 405 55.63% 55.63% | 301 41.35% 96.98% | 16 2.20% 99.18% | 3 0.41% 99.59% | 1 0.14% 99.73% | 2 0.27% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 728
+system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 32
+system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 319
+system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 273
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+system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 46.594106
+system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 35.315815
+system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 160 58.61% 58.61% | 102 37.36% 95.97% | 0 0.00% 95.97% | 4 1.47% 97.44% | 4 1.47% 98.90% | 1 0.37% 99.27% | 0 0.00% 99.27% | 1 0.37% 99.63% | 1 0.37% 100.00%
+system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 273
+system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64
+system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639
+system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 730
+system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 59.858904
+system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 52.975537
+system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 37.310775
+system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 311 42.60% 42.60% | 395 54.11% 96.71% | 16 2.19% 98.90% | 1 0.14% 99.04% | 3 0.41% 99.45% | 4 0.55% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 730
+system.ruby.Directory_Controller.GETX 1731 0.00% 0.00%
+system.ruby.Directory_Controller.PUTX 1727 0.00% 0.00%
+system.ruby.Directory_Controller.Memory_Data 1731 0.00% 0.00%
+system.ruby.Directory_Controller.Memory_Ack 1727 0.00% 0.00%
+system.ruby.Directory_Controller.I.GETX 1731 0.00% 0.00%
+system.ruby.Directory_Controller.M.PUTX 1727 0.00% 0.00%
+system.ruby.Directory_Controller.IM.Memory_Data 1731 0.00% 0.00%
+system.ruby.Directory_Controller.MI.Memory_Ack 1727 0.00% 0.00%
+system.ruby.L1Cache_Controller.Load 1185 0.00% 0.00%
+system.ruby.L1Cache_Controller.Ifetch 6413 0.00% 0.00%
+system.ruby.L1Cache_Controller.Store 865 0.00% 0.00%
+system.ruby.L1Cache_Controller.Data 1731 0.00% 0.00%
+system.ruby.L1Cache_Controller.Replacement 1727 0.00% 0.00%
+system.ruby.L1Cache_Controller.Writeback_Ack 1727 0.00% 0.00%
+system.ruby.L1Cache_Controller.I.Load 728 0.00% 0.00%
+system.ruby.L1Cache_Controller.I.Ifetch 730 0.00% 0.00%
+system.ruby.L1Cache_Controller.I.Store 273 0.00% 0.00%
+system.ruby.L1Cache_Controller.M.Load 457 0.00% 0.00%
+system.ruby.L1Cache_Controller.M.Ifetch 5683 0.00% 0.00%
+system.ruby.L1Cache_Controller.M.Store 592 0.00% 0.00%
+system.ruby.L1Cache_Controller.M.Replacement 1727 0.00% 0.00%
+system.ruby.L1Cache_Controller.MI.Writeback_Ack 1727 0.00% 0.00%
+system.ruby.L1Cache_Controller.IS.Data 1458 0.00% 0.00%
+system.ruby.L1Cache_Controller.IM.Data 273 0.00% 0.00%
---------- End Simulation Statistics ----------
projects / gem5.git / blobdiff