init_param=0
kernel=
load_addr_mask=1099511627775
+load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
[system.cpu]
type=DerivO3CPU
-children=branchPred checker dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
+children=branchPred checker dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
LFSTSize=1024
LQEntries=32
LSQCheckLoads=true
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
+dstage2_mmu=system.cpu.dstage2_mmu
dtb=system.cpu.dtb
eventq_index=0
fetchBufferSize=64
isa=system.cpu.isa
issueToExecuteDelay=1
issueWidth=8
+istage2_mmu=system.cpu.istage2_mmu
itb=system.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
[system.cpu.checker]
type=O3Checker
-children=dtb isa itb tracer
+children=dstage2_mmu dtb isa istage2_mmu itb tracer
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=0
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
+dstage2_mmu=system.cpu.checker.dstage2_mmu
dtb=system.cpu.checker.dtb
eventq_index=0
exitOnError=false
function_trace_start=0
interrupts=Null
isa=system.cpu.checker.isa
+istage2_mmu=system.cpu.checker.istage2_mmu
itb=system.cpu.checker.itb
max_insts_all_threads=0
max_insts_any_thread=0
warnOnlyOnLoadError=true
workload=system.cpu.workload
+[system.cpu.checker.dstage2_mmu]
+type=ArmStage2MMU
+children=stage2_tlb
+eventq_index=0
+stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb
+tlb=system.cpu.checker.dtb
+
+[system.cpu.checker.dstage2_mmu.stage2_tlb]
+type=ArmTLB
+children=walker
+eventq_index=0
+is_stage2=true
+size=32
+walker=system.cpu.checker.dstage2_mmu.stage2_tlb.walker
+
+[system.cpu.checker.dstage2_mmu.stage2_tlb.walker]
+type=ArmTableWalker
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+is_stage2=true
+num_squash_per_cycle=2
+sys=system
+port=system.cpu.toL2Bus.slave[9]
+
[system.cpu.checker.dtb]
type=ArmTLB
children=walker
eventq_index=0
+is_stage2=false
size=64
walker=system.cpu.checker.dtb.walker
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
eventq_index=0
+is_stage2=false
num_squash_per_cycle=2
sys=system
-port=system.cpu.toL2Bus.slave[5]
+port=system.cpu.toL2Bus.slave[7]
[system.cpu.checker.isa]
type=ArmISA
eventq_index=0
fpsid=1090793632
+id_aa64afr0_el1=0
+id_aa64afr1_el1=0
+id_aa64dfr0_el1=1052678
+id_aa64dfr1_el1=0
+id_aa64isar0_el1=0
+id_aa64isar1_el1=0
+id_aa64mmfr0_el1=15728642
+id_aa64mmfr1_el1=0
+id_aa64pfr0_el1=17
+id_aa64pfr1_el1=0
id_isar0=34607377
id_isar1=34677009
id_isar2=555950401
id_isar3=17899825
id_isar4=268501314
id_isar5=0
-id_mmfr0=3
+id_mmfr0=270536963
id_mmfr1=0
id_mmfr2=19070976
-id_mmfr3=4027589137
+id_mmfr3=34611729
id_pfr0=49
-id_pfr1=1
-midr=890224640
+id_pfr1=4113
+midr=1091551472
+system=system
+
+[system.cpu.checker.istage2_mmu]
+type=ArmStage2MMU
+children=stage2_tlb
+eventq_index=0
+stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb
+tlb=system.cpu.checker.itb
+
+[system.cpu.checker.istage2_mmu.stage2_tlb]
+type=ArmTLB
+children=walker
+eventq_index=0
+is_stage2=true
+size=32
+walker=system.cpu.checker.istage2_mmu.stage2_tlb.walker
+
+[system.cpu.checker.istage2_mmu.stage2_tlb.walker]
+type=ArmTableWalker
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+is_stage2=true
+num_squash_per_cycle=2
+sys=system
+port=system.cpu.toL2Bus.slave[8]
[system.cpu.checker.itb]
type=ArmTLB
children=walker
eventq_index=0
+is_stage2=false
size=64
walker=system.cpu.checker.itb.walker
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
eventq_index=0
+is_stage2=false
num_squash_per_cycle=2
sys=system
-port=system.cpu.toL2Bus.slave[4]
+port=system.cpu.toL2Bus.slave[6]
[system.cpu.checker.tracer]
type=ExeTracer
sequential_access=false
size=262144
+[system.cpu.dstage2_mmu]
+type=ArmStage2MMU
+children=stage2_tlb
+eventq_index=0
+stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
+tlb=system.cpu.dtb
+
+[system.cpu.dstage2_mmu.stage2_tlb]
+type=ArmTLB
+children=walker
+eventq_index=0
+is_stage2=true
+size=32
+walker=system.cpu.dstage2_mmu.stage2_tlb.walker
+
+[system.cpu.dstage2_mmu.stage2_tlb.walker]
+type=ArmTableWalker
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+is_stage2=true
+num_squash_per_cycle=2
+sys=system
+port=system.cpu.toL2Bus.slave[5]
+
[system.cpu.dtb]
type=ArmTLB
children=walker
eventq_index=0
+is_stage2=false
size=64
walker=system.cpu.dtb.walker
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
eventq_index=0
+is_stage2=false
num_squash_per_cycle=2
sys=system
port=system.cpu.toL2Bus.slave[3]
type=ArmISA
eventq_index=0
fpsid=1090793632
+id_aa64afr0_el1=0
+id_aa64afr1_el1=0
+id_aa64dfr0_el1=1052678
+id_aa64dfr1_el1=0
+id_aa64isar0_el1=0
+id_aa64isar1_el1=0
+id_aa64mmfr0_el1=15728642
+id_aa64mmfr1_el1=0
+id_aa64pfr0_el1=17
+id_aa64pfr1_el1=0
id_isar0=34607377
id_isar1=34677009
id_isar2=555950401
id_isar3=17899825
id_isar4=268501314
id_isar5=0
-id_mmfr0=3
+id_mmfr0=270536963
id_mmfr1=0
id_mmfr2=19070976
-id_mmfr3=4027589137
+id_mmfr3=34611729
id_pfr0=49
-id_pfr1=1
-midr=890224640
+id_pfr1=4113
+midr=1091551472
+system=system
+
+[system.cpu.istage2_mmu]
+type=ArmStage2MMU
+children=stage2_tlb
+eventq_index=0
+stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
+tlb=system.cpu.itb
+
+[system.cpu.istage2_mmu.stage2_tlb]
+type=ArmTLB
+children=walker
+eventq_index=0
+is_stage2=true
+size=32
+walker=system.cpu.istage2_mmu.stage2_tlb.walker
+
+[system.cpu.istage2_mmu.stage2_tlb.walker]
+type=ArmTableWalker
+clk_domain=system.cpu_clk_domain
+eventq_index=0
+is_stage2=true
+num_squash_per_cycle=2
+sys=system
+port=system.cpu.toL2Bus.slave[4]
[system.cpu.itb]
type=ArmTLB
children=walker
eventq_index=0
+is_stage2=false
size=64
walker=system.cpu.itb.walker
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
eventq_index=0
+is_stage2=false
num_squash_per_cycle=2
sys=system
port=system.cpu.toL2Bus.slave[2]
use_default_range=false
width=32
master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port system.cpu.checker.istage2_mmu.stage2_tlb.walker.port system.cpu.checker.dstage2_mmu.stage2_tlb.walker.port
[system.cpu.tracer]
type=ExeTracer