stats: updates due to o3 smt fix

[gem5.git] / tests / quick / se / 01.hello-2T-smt / ref / alpha / linux / o3-timing / config.ini

diff --git a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
index 39d7de9781c27a21253c9b19f634567b9922072e..7f876e81bb6f3159da7157f5908b24d8826ab28c 100644 (file)
--- a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
+++ b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
@@ -18,6 +18,7 @@ eventq_index=0
 init_param=0
 kernel=
 load_addr_mask=1099511627775
+load_offset=0
 mem_mode=timing
 mem_ranges=
 memories=system.physmem
@@ -604,7 +605,7 @@ env=
 errout=cerr
 euid=100
 eventq_index=0
-executable=/dist/test-progs/hello/bin/alpha/linux/hello
+executable=tests/test-progs/hello/bin/alpha/linux/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -624,7 +625,7 @@ env=
 errout=cerr
 euid=100
 eventq_index=0
-executable=/dist/test-progs/hello/bin/alpha/linux/hello
+executable=tests/test-progs/hello/bin/alpha/linux/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -653,9 +654,9 @@ master=system.physmem.port
 slave=system.system_port system.cpu.l2cache.mem_side
 
 [system.physmem]
-type=SimpleDRAM
+type=DRAMCtrl
 activation_limit=4
-addr_mapping=RaBaChCo
+addr_mapping=RoRaBaChCo
 banks_per_rank=8
 burst_length=8
 channels=1
@@ -666,9 +667,11 @@ device_rowbuffer_size=1024
 devices_per_rank=8
 eventq_index=0
 in_addr_map=true
+max_accesses_per_row=16
 mem_sched_policy=frfcfs
+min_writes_per_switch=16
 null=false
-page_policy=open
+page_policy=open_adaptive
 range=0:134217727
 ranks_per_channel=2
 read_buffer_size=32
@@ -684,9 +687,9 @@ tRP=13750
 tRRD=6250
 tWTR=7500
 tXAW=40000
-write_buffer_size=32
-write_high_thresh_perc=70
-write_low_thresh_perc=0
+write_buffer_size=64
+write_high_thresh_perc=85
+write_low_thresh_perc=50
 port=system.membus.master[0]
 
 [system.voltage_domain]