verific: Improve logic generated for SVA value change expressions
[yosys.git] / tests / sva / sva_value_change_changed.sv
diff --git a/tests/sva/sva_value_change_changed.sv b/tests/sva/sva_value_change_changed.sv
new file mode 100644 (file)
index 0000000..8f3a05a
--- /dev/null
@@ -0,0 +1,17 @@
+module top (
+       input clk,
+       input a, b
+);
+       default clocking @(posedge clk); endclocking
+
+       assert property (
+               $changed(b)
+       );
+
+`ifndef FAIL
+       assume property (
+               b !== 'x ##1 $changed(b)
+       );
+`endif
+
+endmodule