sim._pyrtl: sign extend RHS of assignment.

[nmigen.git] / tests / test_sim.py

diff --git a/tests/test_sim.py b/tests/test_sim.py
index bb806f26574fc9a21bcc12ac10a2533b461fba1d..d2d255f5e94853f1d5ba06154267746b60da2d3c 100644 (file)
--- a/tests/test_sim.py
+++ b/tests/test_sim.py
@@ -67,6 +67,11 @@ class SimulatorUnitTestCase(FHDLTestCase):
         self.assertStatement(stmt, [C(0b01, unsigned(2)), C(0b0001, signed(4))], C(1))
         self.assertStatement(stmt, [C(0b11, unsigned(2)), C(0b1111, signed(4))], C(1))
 
+    def test_as_signed_issue_502(self):
+        stmt = lambda y, a: y.eq(a.as_signed())
+        self.assertStatement(stmt, [C(0b01, unsigned(2))], C(0b0001, signed(4)))
+        self.assertStatement(stmt, [C(0b11, unsigned(2))], C(0b1111, signed(4)))
+
     def test_any(self):
         stmt = lambda y, a: y.eq(a.any())
         self.assertStatement(stmt, [C(0b00, 2)], C(0))