sort out table links
[libreriscv.git] / veera.mdwn
index f10e62e3357c7f40cf883db535f61d23916fb502..047b1a08fc8991c8b6356aac51afb83a7afb776e 100644 (file)
@@ -18,6 +18,24 @@ Helping Core Hardware developers.
 
 submitted but not confirmed paid:
 
+### NLNet.2019.10.046.Standards
+
+* [Bug #839](https://bugs.libre-soc.org/show_bug.cgi?id=839):
+  SVP64 / Extra-V / ZOLC whitepaper
+
+### NLNet.2019.10.032.Formal
+
+* [Bug #847](https://bugs.libre-soc.org/show_bug.cgi?id=847):
+  dev\-env\-setup script for binutils-gdb for target powerpc64le\-linux\-gnu
+
+* [Bug #883](https://bugs.libre-soc.org/show_bug.cgi?id=883):
+  add cvc5 and bitwuzla to hdl-yosys-tools
+
+### NLNet.2019.10.043.Wishbone
+
+* [Bug #878](https://bugs.libre-soc.org/show_bug.cgi?id=878):
+  image conversion explaining multi-issue
+
 ## Paid
 
 donation from NLNet confirmed received: