X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=AUTHORS;h=e485aeca41f6f55421da6833d281395196606abb;hb=a5ea52bb456951a7c8bdecfe251ca8a093bcfb2f;hp=eebe40c9391709866474ded89775fd0506bb7213;hpb=58a6260a83a1149af72a678d7c50c3803b4d0156;p=gem5.git diff --git a/AUTHORS b/AUTHORS index eebe40c93..e485aeca4 100644 --- a/AUTHORS +++ b/AUTHORS @@ -1,47 +1,109 @@ -Steven K. Reinhardt ------------------------ Nathan L. Binkert ----------------------- +* Alpha full system support +* Statistics package +* Event queue +* Pseudo instructions +* Remote GDB facilities +* PC sampling +* Trace facilities +* Tru64 support +* Ethernet (Link, NSGIGE, Sinic) device support +* PCI device support +* Checkpoint framework +* Configuration system -Erik G. Hallnor +Steven K. Reinhardt ----------------------- +* Alpha support +* ISA parsing +* SWIG intergration +* New memory system +* New Caches +* Simple CPU +* Instruction tracing +* PC sampling +* Deprecated detailed CPU +* Binary Loading +* Configuration system -Steve E. Raasch +Ali G. Saidi ----------------------- +* SPARC Full System Support +* Alpha Linux support +* Alpha (Tsunami) platform and devices +* I/O <-> memory interface +* PCI device interface +* Multiple ISA support +* Ethernet (Intel NIC) device model +* Memory bridge, bus, packet, port interfaces -Lisa R. Hsu +Kevin T. Lim ----------------------- -DP83820 NIC device model +* New CPU model +* CPU checker +* CPU class restructuring +* Quiecsing/Draining +Ronald G. Dreslinski Jr +----------------------- +* Caches/Cache coherence +* Prefetching +* New memory system (port, request, packet, cache porting) +* Tru64 MP support -Ali G. Saidi +Lisa R. Hsu ----------------------- +* DP83820 NIC device model +* Kernel stats +* Linux Dist disk image building (current) -Andrew L. Schultz +Gabriel Black ----------------------- +* Multiple ISA support +* SPARC ISA support +* X86 ISA support +* Alpha support reorganization +* SPARC SE support +* X86 SE support +* Remote GDB in SE support +* TLB based translation in SE +* Statetrace debugging tool +* Microcode system -Kevin T. Lim +Korey L. Sewell ----------------------- -O3CPU model, CPU checker, revisions to CPU interfaces, transitioning some functionality and configurations over to Python. +* O3CPU SMT support +* MIPS ISA support +* Multiple ISA support in O3CPU -Ronald G. Dreslinski Jr +Andrew L. Schultz ----------------------- +* IDE controller/disk model +* PCI devices interface +* Linux Dist disk image building (deprecated) -Gabriel Black +Erik G. Hallnor ----------------------- -SPARC ISA +* Caches +* Trace reader support +* Checkpoint framework -Korey L. Sewell +Steve E. Raasch ----------------------- -MIPS ISA / O3CPU SMT Support +* Deprecated CPU model +* Generic CPU structures David Green ----------------------- +* Deprecated CPU model +* Caches Benjamin S. Nash ----------------------- +* Alpha FreeBSD support Miguel J. Serrano ----------------------- - +* Alpha FreeBSD support