X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=about_us.mdwn;h=fbd1d24bd7168d6fce9f86b88205501fbf00d37a;hb=b857fce8994a5438da7a0ef9da444eb4ee41223a;hp=105f0af63df508ca0b260b16507d7dc24e75606c;hpb=0fd766d4dc16f46aca60dc75e7bb5d9acbcfe76f;p=libreriscv.git

diff --git a/about_us.mdwn b/about_us.mdwn
index 105f0af63..fbd1d24bd 100644
--- a/about_us.mdwn
+++ b/about_us.mdwn
@@ -51,7 +51,7 @@ Also, check out [[The_Mission]].
   compression, signal processing (sound & picture), optimisations,
   design for test...
 
-## Lauri Kasanen
+## [[Lauri Kasanen|lauri]]
 
 * Embedded software engineer
 * Interests: niche platforms, embedded, servers, graphics
@@ -125,3 +125,100 @@ Alain's website: <http://phcomp.co.uk>
 * Experience: GCC, binutils, glibc, GNU autotools, Free Software activism.
 * website: [[https://www.fsfla.org/~lxoliva/]]
 * Availability: 10+hrs/week
+
+## [[Richard Wilbur|rwilbur]]
+
+* Interests:  Libre in hardware and software, low-power, efficiency
+* Hardware Experience:  High-speed digital(comb. & FSM), PLD(PALASM), FPGA(VHDL), low-power, analog video, I2C, DDC, PCI, RS-232/422/485, SOC board bring-up, PCB layout, VLSI gate design
+* Software Experience:  optimization, 3D geometry transformations, simulation, atomic & multi-threaded, PCI auto-configuration, drivers (serial HW, MPEG encoder/decoder(TS generation/consumption), GPS), OpenGL vertex shader, SQL db, network protocol design, test-driven dev, PCI BIOS, fixed-point division
+* Languages:  C, C++, Python, asm, bash, PERL, BASIC, Forth, ruby
+* Architectures:  6502/10, 68k, x86_64, PPC, i960, SPARC
+* Website:  [[https://launchpad.net/~richard-wilbur]]
+* Availability:  10+hrs/week, more is negotiable
+* Timezone:  UTC-07:00 (DST UTC-06:00, 2nd Sun of Mar-1st Sun of Nov)
+
+## [[Mikolaj Wielgus|mikolajw]]
+
+* Interests: Libre software and hardware, analog circuits, RF and microwave circuits, nonlinear systems, oscillators
+* Hardware Experience: PCB schematic and layout design, very small amount of IC design
+* Software Experience: Data acquisition and processing (LXI, SCPI), GUI development (wxWidgets), Microcontroller programming (AVR, STM32), video game development (Love2D, SDL)
+* Languages: Verilog, Asm (AVR), C, C++, C#, D, Python, Octave, Lua, Java, or any other language involving a similar set of abstractions
+* GitLab: https://gitlab.com/mwielgus
+* Most of my skills are self-taught by making small amateur projects. I have only little industry experience.
+* Availability: ~6 hrs/week
+* Timezone: UTC+01:00
+
+## Object Automation
+
+### [[oa/madan]]
+
+* Interests: Programming in Python and Knowledge of ML algorithms and NLP
+* Availability: 5 hours per week
+* Statistician
+
+
+### [[oa/gautham]]
+
+* Interests: Digital System Design, PCB Layout, Programming, Machine Learning
+* Programming Languages: Verilog, C, C++, Python
+* Availability: ~8-10 hours/week
+
+### [[oa/adithya]]
+
+* Interests:Digital System Design,PCB layout, Programming, Machine Learning, IoT
+* Programming Languages: Verilog, C, C++, Java, Python3, Julia
+* Availability: ~10hrs per week
+
+### [[oa/Niranjan]]
+
+* Interests: Digital System Design, PCB Layout, Programming
+* Programming Languages: Verilog, C, C++, Python
+* Availability: ~8-10 hours/week
+
+### [[oa/Abhishek]]
+
+* Interests: HPC, embedded systems, Digital system design 
+* Programming Languages: C, Python, Java, VHDL
+* Availability: ~8-10 hours/week
+
+### [[oa/Sukhanshu D]]
+
+* Experience: SOC Verification Intern, Digital Design
+* Programming Languages: Python, Verilog, Ng-spice
+* Availability: 4-6 hours per week
+
+### [[oa/Mehul N]]
+
+* Interests: Digital Design, Verification, IC Fabrication
+* Programming Languages: Verilog, System Verilog, UVM
+* Availability: ~ 6-8 hours/week
+* Experience: SoC Verification Intern, Research Intern at KIS
+
+## 3mdeb
+
+### [[Dmitry Selyutin|3mdeb/ghostmansd]]
+
+* Interests: OS development, fishing, classical antiquity
+* Languages: C, C++, Python
+* FW experience: system programming
+* Availability: depends on a week (0..10+hrs/week)
+
+## [[Kyle Lehman|klehman]]
+
+* Languages: C/C++, Java, Python, SQL, assembly
+* Interests: Language design, microacrhitecture, OS design, emulation, 3D computation 
+* Other interests: Nearly anything that floats, flies, or has an engine with wheels
+
+## [[Andrey Miroshnikov|andreym]]
+* Languages: C, Python, Verilog
+* Interests: Analogue/digital electronics, RF, mobile comms, compilers, FPGAs, discrete mathematics, microarchitecture, Unix OSs, PCB design
+* Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium)
+* Other interests: Lingua Latina, Philosophy, History
+* Availability: Full-time
+
+## [[Manikandan Nagarajan|Manik]]
+
+* Languages: Verilog HDL, VHDL, C, Python & TCL
+* Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. 
+* LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
+* Availability: 8~10hrs/week