X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=shakti%2Fm_class%2FAXI.mdwn;h=f621976ffd61ac670662d8ba3cf0a4870f4adb22;hb=fb98de608e23a23ffce7b853e705a111a251bc01;hp=48c152953206b32336ecac2e2777d8e219aebfc7;hpb=f602f51a26daf4b01c78fbdd4892160c75931a36;p=libreriscv.git diff --git a/shakti/m_class/AXI.mdwn b/shakti/m_class/AXI.mdwn index 48c152953..f621976ff 100644 --- a/shakti/m_class/AXI.mdwn +++ b/shakti/m_class/AXI.mdwn @@ -8,4 +8,8 @@ See also [[wishbone]] Bus # AXI4 in migen +Implementations of AXI4 in nmigen (not just bridges) + * +* +* nmigen-soc planning to have AXI4