X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=src%2Farch%2Fmips%2Fisa%2Fbase.isa;h=54647300bbc8725d7218f32c5f431d4e6a455237;hb=4e7fe439d7fe9cefb8cae5e79a1caa7aa4f0b45b;hp=455ed70e70e4bb59d257099cdc96e6cd122af38c;hpb=219c423f1fb0f9a559bfa87f9812426d5e2c3e29;p=gem5.git

diff --git a/src/arch/mips/isa/base.isa b/src/arch/mips/isa/base.isa
index 455ed70e7..54647300b 100644
--- a/src/arch/mips/isa/base.isa
+++ b/src/arch/mips/isa/base.isa
@@ -25,8 +25,6 @@
 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Authors: Korey Sewell
 
 ////////////////////////////////////////////////////////////////////
 //
@@ -53,16 +51,23 @@ output header {{
 
         /// Print a register name for disassembly given the unique
         /// dependence tag number (FP or int).
-        void printReg(std::ostream &os, int reg) const;
+        void printReg(std::ostream &os, RegId reg) const;
 
-        std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+        std::string generateDisassembly(
+                Addr pc, const SymbolTable *symtab) const override;
 
       public:
         void
-        advancePC(MipsISA::PCState &pc) const
+        advancePC(MipsISA::PCState &pc) const override
         {
             pc.advance();
         }
+
+        size_t
+        asBytes(void *buf, size_t max_size) override
+        {
+            return simpleAsBytes(buf, max_size, machInst);
+        }
     };
 
 }};
@@ -70,13 +75,13 @@ output header {{
 //Ouputs to decoder.cc
 output decoder {{
 
-    void MipsStaticInst::printReg(std::ostream &os, int reg) const
+    void MipsStaticInst::printReg(std::ostream &os, RegId reg) const
     {
-        if (reg < FP_Reg_Base) {
-            ccprintf(os, "r%d", reg);
+        if (reg.isIntReg()) {
+            ccprintf(os, "r%d", reg.index());
         }
         else {
-            ccprintf(os, "f%d", reg - FP_Reg_Base);
+            ccprintf(os, "f%d", reg.index());
         }
     }