X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=src%2Fbroadcom%2Fqpu%2Fqpu_instr.h;h=ad2d37b60519067397bc419fa50cf92b432976a6;hb=8b98d0954e6168484479cf51d56bface448d00d5;hp=d99bb9db53be33de7829f1757a78bdd03b702da9;hpb=cdfa99657dd56f80c2e966ac1af8a908d007baa2;p=mesa.git diff --git a/src/broadcom/qpu/qpu_instr.h b/src/broadcom/qpu/qpu_instr.h index d99bb9db53b..ad2d37b6051 100644 --- a/src/broadcom/qpu/qpu_instr.h +++ b/src/broadcom/qpu/qpu_instr.h @@ -166,6 +166,7 @@ enum v3d_qpu_add_op { V3D_QPU_A_FLAPUSH, V3D_QPU_A_FLBPUSH, V3D_QPU_A_FLPOP, + V3D_QPU_A_RECIP, V3D_QPU_A_SETMSF, V3D_QPU_A_SETREVF, V3D_QPU_A_NOP, @@ -194,6 +195,11 @@ enum v3d_qpu_add_op { V3D_QPU_A_LDVPMD_IN, V3D_QPU_A_LDVPMD_OUT, V3D_QPU_A_LDVPMP, + V3D_QPU_A_RSQRT, + V3D_QPU_A_EXP, + V3D_QPU_A_LOG, + V3D_QPU_A_SIN, + V3D_QPU_A_RSQRT2, V3D_QPU_A_LDVPMG_IN, V3D_QPU_A_LDVPMG_OUT, V3D_QPU_A_FCMP, @@ -392,6 +398,8 @@ const char *v3d_qpu_unpack_name(enum v3d_qpu_input_unpack unpack); const char *v3d_qpu_branch_cond_name(enum v3d_qpu_branch_cond cond); const char *v3d_qpu_msfign_name(enum v3d_qpu_msfign msfign); +enum v3d_qpu_cond v3d_qpu_cond_invert(enum v3d_qpu_cond cond) ATTRIBUTE_CONST; + bool v3d_qpu_add_op_has_dst(enum v3d_qpu_add_op op); bool v3d_qpu_mul_op_has_dst(enum v3d_qpu_mul_op op); int v3d_qpu_add_op_num_src(enum v3d_qpu_add_op op); @@ -437,19 +445,28 @@ bool v3d_qpu_magic_waddr_is_tmu(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST; bool v3d_qpu_magic_waddr_is_tlb(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST; bool v3d_qpu_magic_waddr_is_vpm(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST; bool v3d_qpu_magic_waddr_is_tsy(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST; +bool v3d_qpu_magic_waddr_loads_unif(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST; bool v3d_qpu_uses_tlb(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; +bool v3d_qpu_instr_is_sfu(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; +bool v3d_qpu_uses_sfu(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_writes_tmu(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; +bool v3d_qpu_writes_tmu_not_tmuc(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_writes_r3(const struct v3d_device_info *devinfo, const struct v3d_qpu_instr *instr) ATTRIBUTE_CONST; bool v3d_qpu_writes_r4(const struct v3d_device_info *devinfo, const struct v3d_qpu_instr *instr) ATTRIBUTE_CONST; bool v3d_qpu_writes_r5(const struct v3d_device_info *devinfo, const struct v3d_qpu_instr *instr) ATTRIBUTE_CONST; +bool v3d_qpu_waits_on_tmu(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_uses_mux(const struct v3d_qpu_instr *inst, enum v3d_qpu_mux mux); bool v3d_qpu_uses_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_reads_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_writes_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; +bool v3d_qpu_reads_flags(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; +bool v3d_qpu_writes_flags(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_sig_writes_address(const struct v3d_device_info *devinfo, const struct v3d_qpu_sig *sig) ATTRIBUTE_CONST; +bool v3d_qpu_unpacks_f32(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; +bool v3d_qpu_unpacks_f16(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; #endif