X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=src%2Fcpu%2Fsimple_thread.cc;h=36603a1c167cd10f908e8ef1578d916d1384f5d8;hb=34ad1123ee5927e3b1503f07649620a533d3eab9;hp=c89a13eef30445ff8529ccd2b5cb3f41839e12b1;hpb=5825a6c9d82b813d983b688da5f1ce18c90f774f;p=gem5.git diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc index c89a13eef..36603a1c1 100644 --- a/src/cpu/simple_thread.cc +++ b/src/cpu/simple_thread.cc @@ -34,45 +34,56 @@ #include #include "arch/isa_traits.hh" -#include "cpu/base.hh" -#include "cpu/simple_thread.hh" -#include "cpu/thread_context.hh" - -#if FULL_SYSTEM +#include "arch/kernel_stats.hh" +#include "arch/stacktrace.hh" +#include "arch/utility.hh" #include "base/callback.hh" #include "base/cprintf.hh" #include "base/output.hh" #include "base/trace.hh" +#include "config/the_isa.hh" +#include "cpu/base.hh" #include "cpu/profile.hh" #include "cpu/quiesce_event.hh" -#include "kern/kernel_stats.hh" +#include "cpu/simple_thread.hh" +#include "cpu/thread_context.hh" +#include "mem/fs_translating_port_proxy.hh" +#include "mem/se_translating_port_proxy.hh" +#include "params/BaseCPU.hh" +#include "sim/faults.hh" +#include "sim/full_system.hh" +#include "sim/process.hh" #include "sim/serialize.hh" #include "sim/sim_exit.hh" -#include "arch/stacktrace.hh" -#else -#include "sim/process.hh" #include "sim/system.hh" -#include "mem/translating_port.hh" -#endif using namespace std; // constructor -#if FULL_SYSTEM SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, - AlphaITB *_itb, AlphaDTB *_dtb, - bool use_kernel_stats) - : ThreadState(_cpu, -1, _thread_num), cpu(_cpu), system(_sys), itb(_itb), - dtb(_dtb) + Process *_process, TheISA::TLB *_itb, + TheISA::TLB *_dtb, TheISA::ISA *_isa) + : ThreadState(_cpu, _thread_num, _process), isa(_isa), + predicate(false), system(_sys), + itb(_itb), dtb(_dtb) +{ + clearArchRegs(); + tc = new ProxyThreadContext(this); +} +SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, + TheISA::TLB *_itb, TheISA::TLB *_dtb, + TheISA::ISA *_isa, bool use_kernel_stats) + : ThreadState(_cpu, _thread_num, NULL), isa(_isa), system(_sys), itb(_itb), + dtb(_dtb) { tc = new ProxyThreadContext(this); quiesceEvent = new EndQuiesceEvent(tc); - regs.clear(); + clearArchRegs(); - if (cpu->params->profile) { + if (baseCpu->params()->profile) { profile = new FunctionProfile(system->kernelSymtab); Callback *cb = new MakeCallbackname(), tid)); - mem_port = system->physmem->getPort("functional"); - mem_port->setPeer(physPort); - physPort->setPeer(mem_port); - - virtPort = new VirtualPort(csprintf("%s-%d-vport", - cpu->name(), tid)); - mem_port = system->physmem->getPort("functional"); - mem_port->setPeer(virtPort); - virtPort->setPeer(mem_port); -} -#else -SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, - Process *_process, int _asid) - : ThreadState(_cpu, -1, _thread_num, _process, _asid), - cpu(_cpu) -{ - regs.clear(); - tc = new ProxyThreadContext(this); -} - -#endif - -SimpleThread::SimpleThread() -#if FULL_SYSTEM - : ThreadState(NULL, -1, -1) -#else - : ThreadState(NULL, -1, -1, NULL, -1) -#endif -{ - tc = new ProxyThreadContext(this); - regs.clear(); + if (use_kernel_stats) + kernelStats = new TheISA::Kernel::Statistics(system); } SimpleThread::~SimpleThread() @@ -135,51 +109,12 @@ SimpleThread::~SimpleThread() void SimpleThread::takeOverFrom(ThreadContext *oldContext) { - // some things should already be set up -#if FULL_SYSTEM - assert(system == oldContext->getSystemPtr()); -#else - assert(process == oldContext->getProcessPtr()); -#endif - - copyState(oldContext); -#if FULL_SYSTEM - EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent(); - if (quiesce) { - // Point the quiesce event's TC at this TC so that it wakes up - // the proper CPU. - quiesce->tc = tc; - } - if (quiesceEvent) { - quiesceEvent->tc = tc; - } - - Kernel::Statistics *stats = oldContext->getKernelStats(); - if (stats) { - kernelStats = stats; - } -#endif + ::takeOverFrom(*tc, *oldContext); + decoder.takeOverFrom(oldContext->getDecoderPtr()); + kernelStats = oldContext->getKernelStats(); + funcExeInst = oldContext->readFuncExeInst(); storeCondFailures = 0; - - oldContext->setStatus(ThreadContext::Unallocated); -} - -void -SimpleThread::copyTC(ThreadContext *context) -{ - copyState(context); - -#if FULL_SYSTEM - EndQuiesceEvent *quiesce = context->getQuiesceEvent(); - if (quiesce) { - quiesceEvent = quiesce; - } - Kernel::Statistics *stats = context->getKernelStats(); - if (stats) { - kernelStats = stats; - } -#endif } void @@ -188,19 +123,18 @@ SimpleThread::copyState(ThreadContext *oldContext) // copy over functional state _status = oldContext->status(); copyArchRegs(oldContext); - cpuId = oldContext->readCpuId(); -#if !FULL_SYSTEM - funcExeInst = oldContext->readFuncExeInst(); -#endif - inst = oldContext->getInst(); + if (FullSystem) + funcExeInst = oldContext->readFuncExeInst(); + + _threadId = oldContext->threadId(); + _contextId = oldContext->contextId(); } void SimpleThread::serialize(ostream &os) { ThreadState::serialize(os); - regs.serialize(os); - // thread_num and cpu_id are deterministic from the config + ::serialize(*tc, os); } @@ -208,36 +142,32 @@ void SimpleThread::unserialize(Checkpoint *cp, const std::string §ion) { ThreadState::unserialize(cp, section); - regs.unserialize(cp, section); - // thread_num and cpu_id are deterministic from the config + ::unserialize(*tc, cp, section); +} + +void +SimpleThread::startup() +{ + isa->startup(tc); } -#if FULL_SYSTEM void SimpleThread::dumpFuncProfile() { - std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name())); + std::ostream *os = simout.create(csprintf("profile.%s.dat", + baseCpu->name())); profile->dump(tc, *os); } -#endif void -SimpleThread::activate(int delay) +SimpleThread::activate() { if (status() == ThreadContext::Active) return; - lastActivate = curTick; - - if (status() == ThreadContext::Unallocated) { - cpu->activateWhenReady(tid); - return; - } - + lastActivate = curTick(); _status = ThreadContext::Active; - - // status() == Suspended - cpu->activateContext(tid, delay); + baseCpu->activateContext(_threadId); } void @@ -246,30 +176,12 @@ SimpleThread::suspend() if (status() == ThreadContext::Suspended) return; - lastActivate = curTick; - lastSuspend = curTick; -/* -#if FULL_SYSTEM - // Don't change the status from active if there are pending interrupts - if (cpu->check_interrupts()) { - assert(status() == ThreadContext::Active); - return; - } -#endif -*/ + lastActivate = curTick(); + lastSuspend = curTick(); _status = ThreadContext::Suspended; - cpu->suspendContext(tid); + baseCpu->suspendContext(_threadId); } -void -SimpleThread::deallocate() -{ - if (status() == ThreadContext::Unallocated) - return; - - _status = ThreadContext::Unallocated; - cpu->deallocateContext(tid); -} void SimpleThread::halt() @@ -278,17 +190,15 @@ SimpleThread::halt() return; _status = ThreadContext::Halted; - cpu->haltContext(tid); + baseCpu->haltContext(_threadId); } void SimpleThread::regStats(const string &name) { -#if FULL_SYSTEM - if (kernelStats) + if (FullSystem && kernelStats) kernelStats->regStats(name + ".kern"); -#endif } void @@ -297,51 +207,18 @@ SimpleThread::copyArchRegs(ThreadContext *src_tc) TheISA::copyRegs(src_tc, tc); } -#if FULL_SYSTEM -VirtualPort* -SimpleThread::getVirtPort(ThreadContext *src_tc) +// The following methods are defined in src/arch/alpha/ev5.cc for +// Alpha. +#if THE_ISA != ALPHA_ISA +Fault +SimpleThread::hwrei() { - if (!src_tc) - return virtPort; - - VirtualPort *vp; - Port *mem_port; - - vp = new VirtualPort("tc-vport", src_tc); - mem_port = system->physmem->getPort("functional"); - mem_port->setPeer(vp); - vp->setPeer(mem_port); - return vp; + return NoFault; } -void -SimpleThread::delVirtPort(VirtualPort *vp) +bool +SimpleThread::simPalCheck(int palFunc) { - if (vp != virtPort) { - delete vp->getPeer(); - delete vp; - } + return true; } - -#else -TranslatingPort * -SimpleThread::getMemPort() -{ - if (port != NULL) - return port; - - /* Use this port to for syscall emulation writes to memory. */ - Port *dcache_port; - port = new TranslatingPort(csprintf("%s-%d-funcport", - cpu->name(), tid), - process->pTable, false); - dcache_port = cpu->getPort("dcache_port"); - assert(dcache_port != NULL); - dcache_port = dcache_port->getPeer(); -// mem_port->setPeer(port); - port->setPeer(dcache_port); - return port; -} - #endif -