X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=src%2Fgallium%2Fdrivers%2Fetnaviv%2Fetnaviv_internal.h;h=c5b2dc14b1a04f996a7af9861bb4632b7f859a75;hb=7cdde962c5f65165e28cae92da57d2d6e4d7a740;hp=707a1e0773c49e51649ce5e3ef1529edb78117a2;hpb=93ba3f29bbfd996dea5ecd053501800c11fc7f1c;p=mesa.git diff --git a/src/gallium/drivers/etnaviv/etnaviv_internal.h b/src/gallium/drivers/etnaviv/etnaviv_internal.h index 707a1e0773c..c5b2dc14b1a 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_internal.h +++ b/src/gallium/drivers/etnaviv/etnaviv_internal.h @@ -31,7 +31,7 @@ #include "hw/state.xml.h" #include "hw/state_3d.xml.h" -#include +#include "drm/etnaviv_drmif.h" #define ETNA_NUM_INPUTS (16) #define ETNA_NUM_VARYINGS 8 @@ -60,6 +60,8 @@ /* GPU chip 3D specs */ struct etna_specs { + /* HALTI (gross architecture) level. -1 for pre-HALTI. */ + int halti : 8; /* supports SUPERTILE (64x64) tiling? */ unsigned can_supertile : 1; /* needs z=(z+w)/2, for older GCxxx */ @@ -74,6 +76,8 @@ struct etna_specs { unsigned has_new_transcendentals : 1; /* has the new dp2/dpX_norm instructions, among others */ unsigned has_halti2_instructions : 1; + /* has V4_COMPRESSION */ + unsigned v4_compression : 1; /* supports single-buffer rendering with multiple pixel pipes */ unsigned single_buffer : 1; /* has unified uniforms memory */ @@ -82,8 +86,10 @@ struct etna_specs { unsigned has_icache : 1; /* ASTC texture support (and has associated states) */ unsigned tex_astc : 1; + /* has BLT engine instead of RS */ + unsigned use_blt : 1; /* can use any kind of wrapping mode on npot textures */ - unsigned npot_tex_any_wrap; + unsigned npot_tex_any_wrap : 1; /* number of bits per TS tile */ unsigned bits_per_tile; /* clear value for TS (dependent on bits_per_tile) */ @@ -140,6 +146,8 @@ struct etna_specs { struct compiled_blend_color { float color[4]; uint32_t PE_ALPHA_BLEND_COLOR; + uint32_t PE_ALPHA_COLOR_EXT0; + uint32_t PE_ALPHA_COLOR_EXT1; }; /* Compiled pipe_stencil_ref */ @@ -178,7 +186,6 @@ struct compiled_viewport_state { /* Compiled pipe_framebuffer_state */ struct compiled_framebuffer_state { - struct pipe_surface *cbuf, *zsbuf; /* keep reference to surfaces */ uint32_t GL_MULTI_SAMPLE_CONFIG; uint32_t PE_COLOR_FORMAT; uint32_t PE_DEPTH_CONFIG; @@ -190,6 +197,7 @@ struct compiled_framebuffer_state { struct etna_reloc PE_COLOR_ADDR; struct etna_reloc PE_PIPE_COLOR_ADDR[ETNA_MAX_PIXELPIPES]; uint32_t PE_COLOR_STRIDE; + uint32_t PE_MEM_CONFIG; uint32_t SE_SCISSOR_LEFT; uint32_t SE_SCISSOR_TOP; uint32_t SE_SCISSOR_RIGHT; @@ -214,11 +222,15 @@ struct compiled_framebuffer_state { struct compiled_vertex_elements_state { unsigned num_elements; uint32_t FE_VERTEX_ELEMENT_CONFIG[VIVS_FE_VERTEX_ELEMENT_CONFIG__LEN]; + uint32_t NFE_GENERIC_ATTRIB_CONFIG0[VIVS_NFE_GENERIC_ATTRIB__LEN]; + uint32_t NFE_GENERIC_ATTRIB_SCALE[VIVS_NFE_GENERIC_ATTRIB__LEN]; + uint32_t NFE_GENERIC_ATTRIB_CONFIG1[VIVS_NFE_GENERIC_ATTRIB__LEN]; }; /* Compiled context->set_vertex_buffer result */ struct compiled_set_vertex_buffer { uint32_t FE_VERTEX_STREAM_CONTROL; + uint32_t FE_VERTEX_STREAM_UNK14680; struct etna_reloc FE_VERTEX_STREAM_BASE_ADDR; }; @@ -248,6 +260,7 @@ struct compiled_shader_state { uint32_t GL_VARYING_TOTAL_COMPONENTS; uint32_t GL_VARYING_NUM_COMPONENTS; uint32_t GL_VARYING_COMPONENT_USE[2]; + uint32_t GL_HALTI5_SH_SPECIALS; unsigned vs_inst_mem_size; unsigned vs_uniforms_size; unsigned ps_inst_mem_size; @@ -262,12 +275,6 @@ struct compiled_shader_state { /* state of some 3d and common registers relevant to etna driver */ struct etna_3d_state { - unsigned vs_uniforms_size; - unsigned ps_uniforms_size; - - uint32_t /*01008*/ PS_INPUT_COUNT; - uint32_t /*0100C*/ PS_TEMP_REGISTER_CONTROL; - uint32_t /*03818*/ GL_MULTI_SAMPLE_CONFIG; uint32_t /*05000*/ VS_UNIFORMS[VIVS_VS_UNIFORMS__LEN]; uint32_t /*07000*/ PS_UNIFORMS[VIVS_PS_UNIFORMS__LEN]; };