X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=src%2Fgallium%2Fdrivers%2Ffreedreno%2Fir3%2Fir3_shader.h;h=e5410bf88b292da228ef8c2a0f62207a95b14d21;hb=c7811f56c205b113dd820034a99ff3aaa20af636;hp=3d51603fcfbc3477dc0119519a87a935cc5b49da;hpb=82103206feb10b3cfc581fe5ea88673e4d53b744;p=mesa.git

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.h b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
index 3d51603fcfb..e5410bf88b2 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
@@ -69,14 +69,10 @@ struct ir3_shader_key {
 			 */
 			unsigned color_two_side : 1;
 			unsigned half_precision : 1;
-			/* For rendering to alpha, we need a bit of special handling
-			 * since the hw always takes gl_FragColor starting from x
-			 * component, rather than figuring out to take the w component.
-			 * We could be more clever and generate variants for other
-			 * render target formats (ie. luminance formats are xxx1), but
-			 * let's start with this and see how it goes:
+			/* used when shader needs to handle flat varyings (a4xx),
+			 * for TGSI_INTERPOLATE_COLOR:
 			 */
-			unsigned alpha : 1;
+			unsigned rasterflat : 1;
 		};
 		uint32_t global;
 	};
@@ -91,6 +87,9 @@ struct ir3_shader_key {
 	 */
 	uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
 
+	/* bitmask of sampler which produces integer outputs:
+	 */
+	uint16_t vinteger_s, finteger_s;
 };
 
 static inline bool
@@ -111,7 +110,8 @@ struct ir3_shader_variant {
 	struct ir3 *ir;
 
 	/* the instructions length is in units of instruction groups
-	 * (4 instructions, 8 dwords):
+	 * (4 instructions for a3xx, 16 instructions for a4xx.. each
+	 * instruction is 2 dwords):
 	 */
 	unsigned instrlen;
 
@@ -133,7 +133,7 @@ struct ir3_shader_variant {
 	 * to bary.f instructions
 	 */
 	uint8_t pos_regid;
-	bool frag_coord, frag_face;
+	bool frag_coord, frag_face, color0_mrt;
 
 	/* varyings/outputs: */
 	unsigned outputs_count;
@@ -178,6 +178,7 @@ struct ir3_shader_variant {
 	 * (not regid, because TGSI thinks in terms of vec4 registers,
 	 * not scalar registers)
 	 */
+	unsigned first_driver_param;
 	unsigned first_immediate;
 	unsigned immediates_count;
 	struct {
@@ -203,14 +204,15 @@ struct ir3_shader {
 	/* so far, only used for blit_prog shader.. values for
 	 * VPC_VARYING_PS_REPL[i].MODE
 	 */
-	uint32_t vpsrepl[4];
+	uint32_t vpsrepl[8];
 };
 
+void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id);
 
 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
 		const struct tgsi_token *tokens, enum shader_t type);
 void ir3_shader_destroy(struct ir3_shader *shader);
-
+uint32_t ir3_shader_gpuid(struct ir3_shader *shader);
 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
 		struct ir3_shader_key key);