X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=src%2Fgallium%2Fdrivers%2Fradeonsi%2Fsi_blit.c;h=70ad55d8a41b6e470bea641ad2848ce05a4f0751;hb=37916a66b1ab8943e052874632785f033f2f04e2;hp=fe059b3657735b7bb204038eac88b9a00de59d0b;hpb=b936f9aa327ff8e10422b90cdb4bc56d8f9e8da5;p=mesa.git diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index fe059b36577..70ad55d8a41 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -25,7 +25,7 @@ #include "si_pipe.h" #include "si_compute.h" -#include "util/u_format.h" +#include "util/format/u_format.h" #include "util/u_log.h" #include "util/u_surface.h" @@ -58,7 +58,11 @@ void si_blitter_begin(struct si_context *sctx, enum si_blitter_op op) util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state); util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader.cso); util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask); - util_blitter_save_scissor(sctx->blitter, &sctx->scissors.states[0]); + util_blitter_save_scissor(sctx->blitter, &sctx->scissors[0]); + util_blitter_save_window_rectangles(sctx->blitter, + sctx->window_rectangles_include, + sctx->num_window_rectangles, + sctx->window_rectangles); } if (op & SI_SAVE_FRAMEBUFFER) @@ -95,6 +99,7 @@ void si_blitter_end(struct si_context *sctx) * non-global VS user SGPRs. */ sctx->shader_pointers_dirty |= SI_DESCS_SHADER_MASK(VERTEX); sctx->vertex_buffer_pointer_dirty = sctx->vb_descriptors_buffer != NULL; + sctx->vertex_buffer_user_sgprs_dirty = sctx->num_vertex_elements > 0; si_mark_atom_dirty(sctx, &sctx->atoms.s.shader_pointers); } @@ -105,8 +110,8 @@ static unsigned u_max_sample(struct pipe_resource *r) static unsigned si_blit_dbcb_copy(struct si_context *sctx, - struct r600_texture *src, - struct r600_texture *dst, + struct si_texture *src, + struct si_texture *dst, unsigned planes, unsigned level_mask, unsigned first_layer, unsigned last_layer, unsigned first_sample, unsigned last_sample) @@ -176,36 +181,11 @@ si_blit_dbcb_copy(struct si_context *sctx, return fully_copied_levels; } -void si_blit_decompress_depth(struct pipe_context *ctx, - struct r600_texture *texture, - struct r600_texture *staging, - unsigned first_level, unsigned last_level, - unsigned first_layer, unsigned last_layer, - unsigned first_sample, unsigned last_sample) -{ - const struct util_format_description *desc; - unsigned planes = 0; - - assert(staging != NULL && "use si_blit_decompress_zs_in_place instead"); - - desc = util_format_description(staging->buffer.b.b.format); - - if (util_format_has_depth(desc)) - planes |= PIPE_MASK_Z; - if (util_format_has_stencil(desc)) - planes |= PIPE_MASK_S; - - si_blit_dbcb_copy( - (struct si_context *)ctx, texture, staging, planes, - u_bit_consecutive(first_level, last_level - first_level + 1), - first_layer, last_layer, first_sample, last_sample); -} - /* Helper function for si_blit_decompress_zs_in_place. */ static void si_blit_decompress_zs_planes_in_place(struct si_context *sctx, - struct r600_texture *texture, + struct si_texture *texture, unsigned planes, unsigned level_mask, unsigned first_layer, unsigned last_layer) { @@ -274,7 +254,7 @@ si_blit_decompress_zs_planes_in_place(struct si_context *sctx, */ static void si_blit_decompress_zs_in_place(struct si_context *sctx, - struct r600_texture *texture, + struct si_texture *texture, unsigned levels_z, unsigned levels_s, unsigned first_layer, unsigned last_layer) { @@ -308,7 +288,7 @@ si_blit_decompress_zs_in_place(struct si_context *sctx, static void si_decompress_depth(struct si_context *sctx, - struct r600_texture *tex, + struct si_texture *tex, unsigned required_planes, unsigned first_level, unsigned last_level, unsigned first_layer, unsigned last_layer) @@ -351,8 +331,8 @@ si_decompress_depth(struct si_context *sctx, */ if (copy_planes && (tex->flushed_depth_texture || - si_init_flushed_depth_texture(&sctx->b, &tex->buffer.b.b, NULL))) { - struct r600_texture *dst = tex->flushed_depth_texture; + si_init_flushed_depth_texture(&sctx->b, &tex->buffer.b.b))) { + struct si_texture *dst = tex->flushed_depth_texture; unsigned fully_copied_levels; unsigned levels = 0; @@ -382,8 +362,9 @@ si_decompress_depth(struct si_context *sctx, } if (inplace_planes) { - bool has_htile = si_htile_enabled(tex, first_level); - bool tc_compat_htile = vi_tc_compat_htile_enabled(tex, first_level); + bool has_htile = si_htile_enabled(tex, first_level, inplace_planes); + bool tc_compat_htile = vi_tc_compat_htile_enabled(tex, first_level, + inplace_planes); /* Don't decompress if there is no HTILE or when HTILE is * TC-compatible. */ @@ -417,7 +398,7 @@ si_decompress_depth(struct si_context *sctx, */ if (copy_planes && tex->buffer.b.b.nr_samples > 1) si_make_CB_shader_coherent(sctx, tex->buffer.b.b.nr_samples, - false); + false, true /* no DCC */); } static void @@ -430,7 +411,7 @@ si_decompress_sampler_depth_textures(struct si_context *sctx, while (mask) { struct pipe_sampler_view *view; struct si_sampler_view *sview; - struct r600_texture *tex; + struct si_texture *tex; i = u_bit_scan(&mask); @@ -438,7 +419,7 @@ si_decompress_sampler_depth_textures(struct si_context *sctx, assert(view); sview = (struct si_sampler_view*)view; - tex = (struct r600_texture *)view->texture; + tex = (struct si_texture *)view->texture; assert(tex->db_compatible); si_decompress_depth(sctx, tex, @@ -449,10 +430,11 @@ si_decompress_sampler_depth_textures(struct si_context *sctx, } static void si_blit_decompress_color(struct si_context *sctx, - struct r600_texture *rtex, - unsigned first_level, unsigned last_level, - unsigned first_layer, unsigned last_layer, - bool need_dcc_decompress) + struct si_texture *tex, + unsigned first_level, unsigned last_level, + unsigned first_layer, unsigned last_layer, + bool need_dcc_decompress, + bool need_fmask_expand) { void* custom_blend; unsigned layer, checked_last_layer, max_layer; @@ -460,7 +442,7 @@ static void si_blit_decompress_color(struct si_context *sctx, u_bit_consecutive(first_level, last_level - first_level + 1); if (!need_dcc_decompress) - level_mask &= rtex->dirty_level_mask; + level_mask &= tex->dirty_level_mask; if (!level_mask) return; @@ -473,14 +455,14 @@ static void si_blit_decompress_color(struct si_context *sctx, if (need_dcc_decompress) { custom_blend = sctx->custom_blend_dcc_decompress; - assert(rtex->dcc_offset); + assert(tex->surface.dcc_offset); /* disable levels without DCC */ for (int i = first_level; i <= last_level; i++) { - if (!vi_dcc_enabled(rtex, i)) + if (!vi_dcc_enabled(tex, i)) level_mask &= ~(1 << i); } - } else if (rtex->surface.fmask_size) { + } else if (tex->surface.fmask_size) { custom_blend = sctx->custom_blend_fmask_decompress; } else { custom_blend = sctx->custom_blend_eliminate_fastclear; @@ -493,17 +475,17 @@ static void si_blit_decompress_color(struct si_context *sctx, /* The smaller the mipmap level, the less layers there are * as far as 3D textures are concerned. */ - max_layer = util_max_layer(&rtex->buffer.b.b, level); + max_layer = util_max_layer(&tex->buffer.b.b, level); checked_last_layer = MIN2(last_layer, max_layer); for (layer = first_layer; layer <= checked_last_layer; layer++) { struct pipe_surface *cbsurf, surf_tmpl; - surf_tmpl.format = rtex->buffer.b.b.format; + surf_tmpl.format = tex->buffer.b.b.format; surf_tmpl.u.tex.level = level; surf_tmpl.u.tex.first_layer = layer; surf_tmpl.u.tex.last_layer = layer; - cbsurf = sctx->b.create_surface(&sctx->b, &rtex->buffer.b.b, &surf_tmpl); + cbsurf = sctx->b.create_surface(&sctx->b, &tex->buffer.b.b, &surf_tmpl); /* Required before and after FMASK and DCC_DECOMPRESS. */ if (custom_blend == sctx->custom_blend_fmask_decompress || @@ -524,26 +506,33 @@ static void si_blit_decompress_color(struct si_context *sctx, /* The texture will always be dirty if some layers aren't flushed. * I don't think this case occurs often though. */ if (first_layer == 0 && last_layer >= max_layer) { - rtex->dirty_level_mask &= ~(1 << level); + tex->dirty_level_mask &= ~(1 << level); } } sctx->decompression_enabled = false; - si_make_CB_shader_coherent(sctx, rtex->buffer.b.b.nr_samples, - vi_dcc_enabled(rtex, first_level)); + si_make_CB_shader_coherent(sctx, tex->buffer.b.b.nr_samples, + vi_dcc_enabled(tex, first_level), + tex->surface.u.gfx9.dcc.pipe_aligned); + + if (need_fmask_expand && tex->surface.fmask_offset && tex->fmask_is_not_identity) { + si_compute_expand_fmask(&sctx->b, &tex->buffer.b.b); + tex->fmask_is_not_identity = false; + } } static void -si_decompress_color_texture(struct si_context *sctx, struct r600_texture *tex, - unsigned first_level, unsigned last_level) +si_decompress_color_texture(struct si_context *sctx, struct si_texture *tex, + unsigned first_level, unsigned last_level, + bool need_fmask_expand) { /* CMASK or DCC can be discarded and we can still end up here. */ - if (!tex->cmask.size && !tex->surface.fmask_size && !tex->dcc_offset) + if (!tex->cmask_buffer && !tex->surface.fmask_size && !tex->surface.dcc_offset) return; si_blit_decompress_color(sctx, tex, first_level, last_level, 0, util_max_layer(&tex->buffer.b.b, first_level), - false); + false, need_fmask_expand); } static void @@ -555,17 +544,17 @@ si_decompress_sampler_color_textures(struct si_context *sctx, while (mask) { struct pipe_sampler_view *view; - struct r600_texture *tex; + struct si_texture *tex; i = u_bit_scan(&mask); view = textures->views[i]; assert(view); - tex = (struct r600_texture *)view->texture; + tex = (struct si_texture *)view->texture; si_decompress_color_texture(sctx, tex, view->u.tex.first_level, - view->u.tex.last_level); + view->u.tex.last_level, false); } } @@ -578,22 +567,23 @@ si_decompress_image_color_textures(struct si_context *sctx, while (mask) { const struct pipe_image_view *view; - struct r600_texture *tex; + struct si_texture *tex; i = u_bit_scan(&mask); view = &images->views[i]; assert(view->resource->target != PIPE_BUFFER); - tex = (struct r600_texture *)view->resource; + tex = (struct si_texture *)view->resource; si_decompress_color_texture(sctx, tex, view->u.tex.level, - view->u.tex.level); + view->u.tex.level, + view->access & PIPE_IMAGE_ACCESS_WRITE); } } static void si_check_render_feedback_texture(struct si_context *sctx, - struct r600_texture *tex, + struct si_texture *tex, unsigned first_level, unsigned last_level, unsigned first_layer, @@ -601,18 +591,18 @@ static void si_check_render_feedback_texture(struct si_context *sctx, { bool render_feedback = false; - if (!tex->dcc_offset) + if (!tex->surface.dcc_offset) return; for (unsigned j = 0; j < sctx->framebuffer.state.nr_cbufs; ++j) { - struct r600_surface * surf; + struct si_surface * surf; if (!sctx->framebuffer.state.cbufs[j]) continue; - surf = (struct r600_surface*)sctx->framebuffer.state.cbufs[j]; + surf = (struct si_surface*)sctx->framebuffer.state.cbufs[j]; - if (tex == (struct r600_texture *)surf->base.texture && + if (tex == (struct si_texture *)surf->base.texture && surf->base.u.tex.level >= first_level && surf->base.u.tex.level <= last_level && surf->base.u.tex.first_layer <= last_layer && @@ -633,7 +623,7 @@ static void si_check_render_feedback_textures(struct si_context *sctx, while (mask) { const struct pipe_sampler_view *view; - struct r600_texture *tex; + struct si_texture *tex; unsigned i = u_bit_scan(&mask); @@ -641,7 +631,7 @@ static void si_check_render_feedback_textures(struct si_context *sctx, if(view->texture->target == PIPE_BUFFER) continue; - tex = (struct r600_texture *)view->texture; + tex = (struct si_texture *)view->texture; si_check_render_feedback_texture(sctx, tex, view->u.tex.first_level, @@ -658,7 +648,7 @@ static void si_check_render_feedback_images(struct si_context *sctx, while (mask) { const struct pipe_image_view *view; - struct r600_texture *tex; + struct si_texture *tex; unsigned i = u_bit_scan(&mask); @@ -666,7 +656,7 @@ static void si_check_render_feedback_images(struct si_context *sctx, if (view->resource->target == PIPE_BUFFER) continue; - tex = (struct r600_texture *)view->resource; + tex = (struct si_texture *)view->resource; si_check_render_feedback_texture(sctx, tex, view->u.tex.level, @@ -681,13 +671,13 @@ static void si_check_render_feedback_resident_textures(struct si_context *sctx) util_dynarray_foreach(&sctx->resident_tex_handles, struct si_texture_handle *, tex_handle) { struct pipe_sampler_view *view; - struct r600_texture *tex; + struct si_texture *tex; view = (*tex_handle)->view; if (view->texture->target == PIPE_BUFFER) continue; - tex = (struct r600_texture *)view->texture; + tex = (struct si_texture *)view->texture; si_check_render_feedback_texture(sctx, tex, view->u.tex.first_level, @@ -702,13 +692,13 @@ static void si_check_render_feedback_resident_images(struct si_context *sctx) util_dynarray_foreach(&sctx->resident_img_handles, struct si_image_handle *, img_handle) { struct pipe_image_view *view; - struct r600_texture *tex; + struct si_texture *tex; view = &(*img_handle)->view; if (view->resource->target == PIPE_BUFFER) continue; - tex = (struct r600_texture *)view->resource; + tex = (struct si_texture *)view->resource; si_check_render_feedback_texture(sctx, tex, view->u.tex.level, @@ -745,17 +735,17 @@ static void si_decompress_resident_textures(struct si_context *sctx) util_dynarray_foreach(&sctx->resident_tex_needs_color_decompress, struct si_texture_handle *, tex_handle) { struct pipe_sampler_view *view = (*tex_handle)->view; - struct r600_texture *tex = (struct r600_texture *)view->texture; + struct si_texture *tex = (struct si_texture *)view->texture; si_decompress_color_texture(sctx, tex, view->u.tex.first_level, - view->u.tex.last_level); + view->u.tex.last_level, false); } util_dynarray_foreach(&sctx->resident_tex_needs_depth_decompress, struct si_texture_handle *, tex_handle) { struct pipe_sampler_view *view = (*tex_handle)->view; struct si_sampler_view *sview = (struct si_sampler_view *)view; - struct r600_texture *tex = (struct r600_texture *)view->texture; + struct si_texture *tex = (struct si_texture *)view->texture; si_decompress_depth(sctx, tex, sview->is_stencil_sampler ? PIPE_MASK_S : PIPE_MASK_Z, @@ -769,10 +759,11 @@ static void si_decompress_resident_images(struct si_context *sctx) util_dynarray_foreach(&sctx->resident_img_needs_color_decompress, struct si_image_handle *, img_handle) { struct pipe_image_view *view = &(*img_handle)->view; - struct r600_texture *tex = (struct r600_texture *)view->resource; + struct si_texture *tex = (struct si_texture *)view->resource; si_decompress_color_texture(sctx, tex, view->u.tex.level, - view->u.tex.level); + view->u.tex.level, + view->access & PIPE_IMAGE_ACCESS_WRITE); } } @@ -815,16 +806,16 @@ void si_decompress_textures(struct si_context *sctx, unsigned shader_mask) if (sctx->ps_uses_fbfetch) { struct pipe_surface *cb0 = sctx->framebuffer.state.cbufs[0]; si_decompress_color_texture(sctx, - (struct r600_texture*)cb0->texture, + (struct si_texture*)cb0->texture, cb0->u.tex.first_layer, - cb0->u.tex.last_layer); + cb0->u.tex.last_layer, false); } si_check_render_feedback(sctx); } else if (shader_mask & (1 << PIPE_SHADER_COMPUTE)) { - if (sctx->cs_shader_state.program->uses_bindless_samplers) + if (sctx->cs_shader_state.program->sel.info.uses_bindless_samplers) si_decompress_resident_textures(sctx); - if (sctx->cs_shader_state.program->uses_bindless_images) + if (sctx->cs_shader_state.program->sel.info.uses_bindless_images) si_decompress_resident_images(sctx); } } @@ -839,12 +830,12 @@ static void si_decompress_subresource(struct pipe_context *ctx, unsigned first_layer, unsigned last_layer) { struct si_context *sctx = (struct si_context *)ctx; - struct r600_texture *rtex = (struct r600_texture*)tex; + struct si_texture *stex = (struct si_texture*)tex; - if (rtex->db_compatible) { + if (stex->db_compatible) { planes &= PIPE_MASK_Z | PIPE_MASK_S; - if (!rtex->surface.has_stencil) + if (!stex->surface.has_stencil) planes &= ~PIPE_MASK_S; /* If we've rendered into the framebuffer and it's a blitting @@ -856,10 +847,10 @@ static void si_decompress_subresource(struct pipe_context *ctx, sctx->framebuffer.state.zsbuf->texture == tex) si_update_fb_dirtiness_after_rendering(sctx); - si_decompress_depth(sctx, rtex, planes, + si_decompress_depth(sctx, stex, planes, level, level, first_layer, last_layer); - } else if (rtex->surface.fmask_size || rtex->cmask.size || rtex->dcc_offset) { + } else if (stex->surface.fmask_size || stex->cmask_buffer || stex->surface.dcc_offset) { /* If we've rendered into the framebuffer and it's a blitting * source, make sure the decompression pass is invoked * by dirtying the framebuffer. @@ -873,8 +864,8 @@ static void si_decompress_subresource(struct pipe_context *ctx, } } - si_blit_decompress_color(sctx, rtex, level, level, - first_layer, last_layer, false); + si_blit_decompress_color(sctx, stex, level, level, + first_layer, last_layer, false, false); } } @@ -897,7 +888,8 @@ void si_resource_copy_region(struct pipe_context *ctx, const struct pipe_box *src_box) { struct si_context *sctx = (struct si_context *)ctx; - struct r600_texture *rsrc = (struct r600_texture*)src; + struct si_texture *ssrc = (struct si_texture*)src; + struct si_texture *sdst = (struct si_texture*)dst; struct pipe_surface *dst_view, dst_templ; struct pipe_sampler_view src_templ, *src_view; unsigned dst_width, dst_height, src_width0, src_height0; @@ -906,7 +898,18 @@ void si_resource_copy_region(struct pipe_context *ctx, /* Handle buffers first. */ if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) { - si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, 0); + si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width); + return; + } + + if (!util_format_is_compressed(src->format) && + !util_format_is_compressed(dst->format) && + !util_format_is_depth_or_stencil(src->format) && + src->nr_samples <= 1 && + !sdst->surface.dcc_offset && + !(dst->target != src->target && + (src->target == PIPE_TEXTURE_1D_ARRAY || dst->target == PIPE_TEXTURE_1D_ARRAY))) { + si_compute_copy_image(sctx, dst, dst_level, src, src_level, dstx, dsty, dstz, src_box); return; } @@ -929,7 +932,7 @@ void si_resource_copy_region(struct pipe_context *ctx, if (util_format_is_compressed(src->format) || util_format_is_compressed(dst->format)) { - unsigned blocksize = rsrc->surface.bpe; + unsigned blocksize = ssrc->surface.bpe; if (blocksize == 8) src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */ @@ -972,7 +975,7 @@ void si_resource_copy_region(struct pipe_context *ctx, sbox.width = util_format_get_nblocksx(src->format, src_box->width); src_box = &sbox; } else { - unsigned blocksize = rsrc->surface.bpe; + unsigned blocksize = ssrc->surface.bpe; switch (blocksize) { case 1: @@ -1008,36 +1011,8 @@ void si_resource_copy_region(struct pipe_context *ctx, * Note that some chips avoid this issue by using SDMA. */ if (util_format_is_snorm8(dst_templ.format)) { - switch (dst_templ.format) { - case PIPE_FORMAT_R8_SNORM: - dst_templ.format = src_templ.format = PIPE_FORMAT_R8_SINT; - break; - case PIPE_FORMAT_R8G8_SNORM: - dst_templ.format = src_templ.format = PIPE_FORMAT_R8G8_SINT; - break; - case PIPE_FORMAT_R8G8B8X8_SNORM: - dst_templ.format = src_templ.format = PIPE_FORMAT_R8G8B8X8_SINT; - break; - case PIPE_FORMAT_R8G8B8A8_SNORM: - /* There are no SINT variants for ABGR and XBGR, so we have to use RGBA. */ - case PIPE_FORMAT_A8B8G8R8_SNORM: - case PIPE_FORMAT_X8B8G8R8_SNORM: - dst_templ.format = src_templ.format = PIPE_FORMAT_R8G8B8A8_SINT; - break; - case PIPE_FORMAT_A8_SNORM: - dst_templ.format = src_templ.format = PIPE_FORMAT_A8_SINT; - break; - case PIPE_FORMAT_L8_SNORM: - dst_templ.format = src_templ.format = PIPE_FORMAT_L8_SINT; - break; - case PIPE_FORMAT_L8A8_SNORM: - dst_templ.format = src_templ.format = PIPE_FORMAT_L8A8_SINT; - break; - case PIPE_FORMAT_I8_SNORM: - dst_templ.format = src_templ.format = PIPE_FORMAT_I8_SINT; - break; - default:; /* fall through */ - } + dst_templ.format = src_templ.format = + util_format_snorm8_to_sint8(dst_templ.format); } vi_disable_dcc_if_incompatible_format(sctx, dst, dst_level, @@ -1088,16 +1063,16 @@ static void si_do_CB_resolve(struct si_context *sctx, si_blitter_end(sctx); /* Flush caches for possible texturing. */ - si_make_CB_shader_coherent(sctx, 1, false); + si_make_CB_shader_coherent(sctx, 1, false, true /* no DCC */); } static bool do_hardware_msaa_resolve(struct pipe_context *ctx, const struct pipe_blit_info *info) { struct si_context *sctx = (struct si_context*)ctx; - struct r600_texture *src = (struct r600_texture*)info->src.resource; - struct r600_texture *dst = (struct r600_texture*)info->dst.resource; - MAYBE_UNUSED struct r600_texture *rtmp; + struct si_texture *src = (struct si_texture*)info->src.resource; + struct si_texture *dst = (struct si_texture*)info->dst.resource; + ASSERTED struct si_texture *stmp; unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level); unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level); enum pipe_format format = info->src.format; @@ -1139,12 +1114,18 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx, info->src.box.height == dst_height && info->src.box.depth == 1 && !dst->surface.is_linear && - (!dst->cmask.size || !dst->dirty_level_mask)) { /* dst cannot be fast-cleared */ + (!dst->cmask_buffer || !dst->dirty_level_mask)) { /* dst cannot be fast-cleared */ /* Check the last constraint. */ if (src->surface.micro_tile_mode != dst->surface.micro_tile_mode) { /* The next fast clear will switch to this mode to * get direct hw resolve next time if the mode is * different now. + * + * TODO-GFX10: This does not work in GFX10 because MSAA + * is restricted to 64KB_R_X and 64KB_Z_X swizzle modes. + * In some cases we could change the swizzle of the + * destination texture instead, but the more general + * solution is to implement compute shader resolve. */ src->last_msaa_resolve_target_micro_mode = dst->surface.micro_tile_mode; @@ -1156,13 +1137,10 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx, * This is still the fastest codepath even with this clear. */ if (vi_dcc_enabled(dst, info->dst.level)) { - /* TODO: Implement per-level DCC clears for GFX9. */ - if (sctx->chip_class >= GFX9 && - info->dst.resource->last_level != 0) + if (!vi_dcc_clear_level(sctx, dst, info->dst.level, + DCC_UNCOMPRESSED)) goto resolve_to_temp; - vi_dcc_clear_level(sctx, dst, info->dst.level, - 0xFFFFFFFF); dst->dirty_level_mask &= ~(1 << info->dst.level); } @@ -1184,11 +1162,14 @@ resolve_to_temp: templ.depth0 = 1; templ.array_size = 1; templ.usage = PIPE_USAGE_DEFAULT; - templ.flags = SI_RESOURCE_FLAG_FORCE_TILING | + templ.flags = SI_RESOURCE_FLAG_FORCE_MSAA_TILING | + SI_RESOURCE_FLAG_FORCE_MICRO_TILE_MODE | + SI_RESOURCE_FLAG_MICRO_TILE_MODE_SET(src->surface.micro_tile_mode) | SI_RESOURCE_FLAG_DISABLE_DCC; /* The src and dst microtile modes must be the same. */ - if (src->surface.micro_tile_mode == RADEON_MICRO_MODE_DISPLAY) + if (sctx->chip_class <= GFX8 && + src->surface.micro_tile_mode == RADEON_MICRO_MODE_DISPLAY) templ.bind = PIPE_BIND_SCANOUT; else templ.bind = 0; @@ -1196,10 +1177,10 @@ resolve_to_temp: tmp = ctx->screen->resource_create(ctx->screen, &templ); if (!tmp) return false; - rtmp = (struct r600_texture*)tmp; + stmp = (struct si_texture*)tmp; - assert(!rtmp->surface.is_linear); - assert(src->surface.micro_tile_mode == rtmp->surface.micro_tile_mode); + assert(!stmp->surface.is_linear); + assert(src->surface.micro_tile_mode == stmp->surface.micro_tile_mode); /* resolve */ si_do_CB_resolve(sctx, info, tmp, 0, 0, format); @@ -1222,7 +1203,7 @@ static void si_blit(struct pipe_context *ctx, const struct pipe_blit_info *info) { struct si_context *sctx = (struct si_context*)ctx; - struct r600_texture *rdst = (struct r600_texture *)info->dst.resource; + struct si_texture *dst = (struct si_texture *)info->dst.resource; if (do_hardware_msaa_resolve(ctx, info)) { return; @@ -1234,8 +1215,7 @@ static void si_blit(struct pipe_context *ctx, * resource_copy_region can't do this yet, because dma_copy calls it * on failure (recursion). */ - if (rdst->surface.is_linear && - sctx->dma_copy && + if (dst->surface.is_linear && util_can_blit_via_copy_region(info, false)) { sctx->dma_copy(ctx, info->dst.resource, info->dst.level, info->dst.box.x, info->dst.box.y, @@ -1255,12 +1235,12 @@ static void si_blit(struct pipe_context *ctx, vi_disable_dcc_if_incompatible_format(sctx, info->dst.resource, info->dst.level, info->dst.format); - si_decompress_subresource(ctx, info->src.resource, info->mask, + si_decompress_subresource(ctx, info->src.resource, PIPE_MASK_RGBAZS, info->src.level, info->src.box.z, info->src.box.z + info->src.box.depth - 1); - if (sctx->screen->debug_flags & DBG(FORCE_DMA) && + if (sctx->screen->debug_flags & DBG(FORCE_SDMA) && util_try_blit_via_copy_region(ctx, info)) return; @@ -1270,14 +1250,14 @@ static void si_blit(struct pipe_context *ctx, si_blitter_end(sctx); } -static boolean si_generate_mipmap(struct pipe_context *ctx, - struct pipe_resource *tex, - enum pipe_format format, - unsigned base_level, unsigned last_level, - unsigned first_layer, unsigned last_layer) +static bool si_generate_mipmap(struct pipe_context *ctx, + struct pipe_resource *tex, + enum pipe_format format, + unsigned base_level, unsigned last_level, + unsigned first_layer, unsigned last_layer) { struct si_context *sctx = (struct si_context*)ctx; - struct r600_texture *rtex = (struct r600_texture *)tex; + struct si_texture *stex = (struct si_texture *)tex; if (!util_blitter_is_copy_supported(sctx->blitter, tex, tex)) return false; @@ -1291,10 +1271,10 @@ static boolean si_generate_mipmap(struct pipe_context *ctx, /* Clear dirty_level_mask for the levels that will be overwritten. */ assert(base_level < last_level); - rtex->dirty_level_mask &= ~u_bit_consecutive(base_level + 1, + stex->dirty_level_mask &= ~u_bit_consecutive(base_level + 1, last_level - base_level); - sctx->generate_mipmap_for_depth = rtex->is_depth; + sctx->generate_mipmap_for_depth = stex->is_depth; si_blitter_begin(sctx, SI_BLIT | SI_DISABLE_RENDER_COND); util_blitter_generate_mipmap(sctx->blitter, tex, format, @@ -1310,43 +1290,78 @@ static void si_flush_resource(struct pipe_context *ctx, struct pipe_resource *res) { struct si_context *sctx = (struct si_context*)ctx; - struct r600_texture *rtex = (struct r600_texture*)res; + struct si_texture *tex = (struct si_texture*)res; assert(res->target != PIPE_BUFFER); - assert(!rtex->dcc_separate_buffer || rtex->dcc_gather_statistics); + assert(!tex->dcc_separate_buffer || tex->dcc_gather_statistics); /* st/dri calls flush twice per frame (not a bug), this prevents double * decompression. */ - if (rtex->dcc_separate_buffer && !rtex->separate_dcc_dirty) + if (tex->dcc_separate_buffer && !tex->separate_dcc_dirty) return; - if (!rtex->is_depth && (rtex->cmask.size || rtex->dcc_offset)) { - si_blit_decompress_color(sctx, rtex, 0, res->last_level, + if (!tex->is_depth && (tex->cmask_buffer || tex->surface.dcc_offset)) { + si_blit_decompress_color(sctx, tex, 0, res->last_level, 0, util_max_layer(res, 0), - rtex->dcc_separate_buffer != NULL); + tex->dcc_separate_buffer != NULL, false); + + if (tex->surface.display_dcc_offset && tex->displayable_dcc_dirty) { + si_retile_dcc(sctx, tex); + tex->displayable_dcc_dirty = false; + } } /* Always do the analysis even if DCC is disabled at the moment. */ - if (rtex->dcc_gather_statistics && rtex->separate_dcc_dirty) { - rtex->separate_dcc_dirty = false; - vi_separate_dcc_process_and_reset_stats(ctx, rtex); + if (tex->dcc_gather_statistics) { + bool separate_dcc_dirty = tex->separate_dcc_dirty; + + /* If the color buffer hasn't been unbound and fast clear hasn't + * been used, separate_dcc_dirty is false, but there may have been + * new rendering. Check if the color buffer is bound and assume + * it's dirty. + * + * Note that DRI2 never unbinds window colorbuffers, which means + * the DCC pipeline statistics query would never be re-set and would + * keep adding new results until all free memory is exhausted if we + * didn't do this. + */ + if (!separate_dcc_dirty) { + for (unsigned i = 0; i < sctx->framebuffer.state.nr_cbufs; i++) { + if (sctx->framebuffer.state.cbufs[i] && + sctx->framebuffer.state.cbufs[i]->texture == res) { + separate_dcc_dirty = true; + break; + } + } + } + + if (separate_dcc_dirty) { + tex->separate_dcc_dirty = false; + vi_separate_dcc_process_and_reset_stats(ctx, tex); + } } } -void si_decompress_dcc(struct si_context *sctx, struct r600_texture *rtex) +void si_decompress_dcc(struct si_context *sctx, struct si_texture *tex) { - if (!rtex->dcc_offset) + /* If graphics is disabled, we can't decompress DCC, but it shouldn't + * be compressed either. The caller should simply discard it. + */ + if (!tex->surface.dcc_offset || !sctx->has_graphics) return; - si_blit_decompress_color(sctx, rtex, 0, rtex->buffer.b.b.last_level, - 0, util_max_layer(&rtex->buffer.b.b, 0), - true); + si_blit_decompress_color(sctx, tex, 0, tex->buffer.b.b.last_level, + 0, util_max_layer(&tex->buffer.b.b, 0), + true, false); } void si_init_blit_functions(struct si_context *sctx) { sctx->b.resource_copy_region = si_resource_copy_region; - sctx->b.blit = si_blit; - sctx->b.flush_resource = si_flush_resource; - sctx->b.generate_mipmap = si_generate_mipmap; + + if (sctx->has_graphics) { + sctx->b.blit = si_blit; + sctx->b.flush_resource = si_flush_resource; + sctx->b.generate_mipmap = si_generate_mipmap; + } }