X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_shader.h;h=8c5778f904815c3f48e32df8fae2ede6f6f28ac1;hb=63c313de84afa9ee65f5d98e1c843ace3a5c9f21;hp=b33b08f40d75f67686bec1774c90fc347600c784;hpb=6980372010ad5929c0b4b0a0370d281cbd6f8b2e;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index b33b08f40d7..8c5778f9048 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -21,55 +21,48 @@ * IN THE SOFTWARE. */ +#pragma once + #include #include "brw_reg.h" #include "brw_defines.h" #include "brw_context.h" -#include "main/compiler.h" -#include "glsl/ir.h" -#include "program/prog_parameter.h" #ifdef __cplusplus #include "brw_ir_allocator.h" #endif -#pragma once - #define MAX_SAMPLER_MESSAGE_SIZE 11 #define MAX_VGRF_SIZE 16 -enum PACKED register_file { - BAD_FILE, - GRF, - MRF, - IMM, - HW_REG, /* a struct brw_reg */ - ATTR, - UNIFORM, /* prog_data->params[reg] */ -}; - -struct backend_reg -{ #ifdef __cplusplus +struct backend_reg : private brw_reg +{ + backend_reg() {} + backend_reg(const struct brw_reg ®) : brw_reg(reg) {} + + const brw_reg &as_brw_reg() const + { + assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM); + assert(reg_offset == 0); + return static_cast(*this); + } + + brw_reg &as_brw_reg() + { + assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM); + assert(reg_offset == 0); + return static_cast(*this); + } + + bool equals(const backend_reg &r) const; + bool is_zero() const; bool is_one() const; bool is_negative_one() const; bool is_null() const; bool is_accumulator() const; bool in_range(const backend_reg &r, unsigned n) const; -#endif - - enum register_file file; /**< Register file: GRF, MRF, IMM. */ - enum brw_reg_type type; /**< Register type: BRW_REGISTER_TYPE_* */ - - /** - * Register number. - * - * For GRF, it's a virtual register number until register allocation. - * - * For MRF, it's the hardware register. - */ - uint16_t reg; /** * Offset within the virtual register. @@ -82,11 +75,26 @@ struct backend_reg */ uint16_t reg_offset; - struct brw_reg fixed_hw_reg; - - bool negate; - bool abs; + using brw_reg::type; + using brw_reg::file; + using brw_reg::negate; + using brw_reg::abs; + using brw_reg::address_mode; + using brw_reg::subnr; + using brw_reg::nr; + + using brw_reg::swizzle; + using brw_reg::writemask; + using brw_reg::indirect_offset; + using brw_reg::vstride; + using brw_reg::width; + using brw_reg::hstride; + + using brw_reg::f; + using brw_reg::d; + using brw_reg::ud; }; +#endif struct cfg_t; struct bblock_t; @@ -115,6 +123,12 @@ struct backend_instruction : public exec_node { * optimize these out unless you know what you are doing. */ bool has_side_effects() const; + + /** + * True if the instruction might be affected by side effects of other + * instructions. + */ + bool is_volatile() const; #else struct backend_instruction { struct exec_node link; @@ -233,6 +247,18 @@ bool opt_predicated_break(struct backend_shader *s); extern "C" { #endif +/** + * Scratch data used when compiling a GLSL geometry shader. + */ +struct brw_gs_compile +{ + struct brw_gs_prog_key key; + struct brw_vue_map input_vue_map; + + unsigned control_data_bits_per_vertex; + unsigned control_data_header_size_bits; +}; + struct brw_compiler * brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo); @@ -257,10 +283,12 @@ bool brw_cs_precompile(struct gl_context *ctx, struct gl_shader_program *shader_prog, struct gl_program *prog); +GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog); +struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type); + int type_size_scalar(const struct glsl_type *type); int type_size_vec4(const struct glsl_type *type); - -bool is_scalar_shader_stage(const struct brw_compiler *compiler, int stage); +int type_size_vec4_times_4(const struct glsl_type *type); #ifdef __cplusplus }