X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=src%2Fmesa%2Fprogram%2Fprog_to_nir.c;h=fccd16fc8c0c371595ce8d98eed1b8e1b43aad62;hb=46968c114003b30be335adccbc30445aca9b5dea;hp=3067b2516bf6c7577ba34c2f0b458d2e6f4a3875;hpb=58aed1031d40e62c9f41f7c512b3165dd5913d1e;p=mesa.git diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c index 3067b2516bf..fccd16fc8c0 100644 --- a/src/mesa/program/prog_to_nir.c +++ b/src/mesa/program/prog_to_nir.c @@ -33,6 +33,7 @@ #include "prog_instruction.h" #include "prog_parameter.h" #include "prog_print.h" +#include "program.h" /** * \file prog_to_nir.c @@ -142,7 +143,7 @@ ptn_get_src(struct ptn_compile *c, const struct prog_src_register *prog_src) load->variables[0] = nir_deref_var_create(load, c->input_vars[prog_src->Index]); nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL); - nir_instr_insert_after_cf_list(b->cf_node_list, &load->instr); + nir_builder_instr_insert(b, &load->instr); src.src = nir_src_for_ssa(&load->dest.ssa); break; @@ -166,6 +167,8 @@ ptn_get_src(struct ptn_compile *c, const struct prog_src_register *prog_src) } /* FALLTHROUGH */ case PROGRAM_STATE_VAR: { + assert(c->parameters != NULL); + nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_var); nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL); @@ -188,8 +191,6 @@ ptn_get_src(struct ptn_compile *c, const struct prog_src_register *prog_src) /* This is a negative offset which should be added to the address * register's value. */ - nir_alu_src addr_src = { NIR_SRC_INIT }; - addr_src.src = nir_src_for_reg(c->addr_reg); reladdr = nir_iadd(b, reladdr, nir_imm_int(b, prog_src->Index)); deref_arr->base_offset = 0; @@ -202,7 +203,7 @@ ptn_get_src(struct ptn_compile *c, const struct prog_src_register *prog_src) deref_arr->base_offset = prog_src->Index; } - nir_instr_insert_after_cf_list(b->cf_node_list, &load->instr); + nir_builder_instr_insert(b, &load->instr); src.src = nir_src_for_ssa(&load->dest.ssa); break; @@ -252,7 +253,7 @@ ptn_get_src(struct ptn_compile *c, const struct prog_src_register *prog_src) mov->dest.write_mask = 0x1; mov->src[0] = src; mov->src[0].swizzle[0] = swizzle; - nir_instr_insert_after_cf_list(b->cf_node_list, &mov->instr); + nir_builder_instr_insert(b, &mov->instr); chans[i] = &mov->dest.dest.ssa; } @@ -280,7 +281,7 @@ ptn_alu(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src) instr->src[i].src = nir_src_for_ssa(src[i]); instr->dest = dest; - nir_instr_insert_after_cf_list(b->cf_node_list, &instr->instr); + nir_builder_instr_insert(b, &instr->instr); } static void @@ -299,7 +300,7 @@ ptn_move_dest_masked(nir_builder *b, nir_alu_dest dest, mov->src[0].src = nir_src_for_ssa(def); for (unsigned i = def->num_components; i < 4; i++) mov->src[0].swizzle[i] = def->num_components - 1; - nir_instr_insert_after_cf_list(b->cf_node_list, &mov->instr); + nir_builder_instr_insert(b, &mov->instr); } static void @@ -560,7 +561,7 @@ ptn_kil(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src) nir_intrinsic_instr *discard = nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if); discard->src[0] = nir_src_for_ssa(cmp); - nir_instr_insert_after_cf_list(b->cf_node_list, &discard->instr); + nir_builder_instr_insert(b, &discard->instr); } static void @@ -687,7 +688,7 @@ ptn_tex(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src, assert(src_number == num_srcs); nir_ssa_dest_init(&instr->instr, &instr->dest, 4, NULL); - nir_instr_insert_after_cf_list(b->cf_node_list, &instr->instr); + nir_builder_instr_insert(b, &instr->instr); /* Resolve the writemask on the texture op. */ ptn_move_dest(b, dest, &instr->dest.ssa); @@ -699,7 +700,7 @@ static const nir_op op_trans[MAX_OPCODE] = { [OPCODE_ADD] = nir_op_fadd, [OPCODE_ARL] = 0, [OPCODE_CMP] = 0, - [OPCODE_COS] = nir_op_fcos, + [OPCODE_COS] = 0, [OPCODE_DDX] = nir_op_fddx, [OPCODE_DDY] = nir_op_fddy, [OPCODE_DP2] = 0, @@ -708,11 +709,11 @@ static const nir_op op_trans[MAX_OPCODE] = { [OPCODE_DPH] = 0, [OPCODE_DST] = 0, [OPCODE_END] = 0, - [OPCODE_EX2] = nir_op_fexp2, + [OPCODE_EX2] = 0, [OPCODE_EXP] = 0, [OPCODE_FLR] = nir_op_ffloor, [OPCODE_FRC] = nir_op_ffract, - [OPCODE_LG2] = nir_op_flog2, + [OPCODE_LG2] = 0, [OPCODE_LIT] = 0, [OPCODE_LOG] = 0, [OPCODE_LRP] = 0, @@ -721,15 +722,15 @@ static const nir_op op_trans[MAX_OPCODE] = { [OPCODE_MIN] = nir_op_fmin, [OPCODE_MOV] = nir_op_fmov, [OPCODE_MUL] = nir_op_fmul, - [OPCODE_POW] = nir_op_fpow, - [OPCODE_RCP] = nir_op_frcp, + [OPCODE_POW] = 0, + [OPCODE_RCP] = 0, - [OPCODE_RSQ] = nir_op_frsq, + [OPCODE_RSQ] = 0, [OPCODE_SCS] = 0, [OPCODE_SEQ] = 0, [OPCODE_SGE] = 0, [OPCODE_SGT] = 0, - [OPCODE_SIN] = nir_op_fsin, + [OPCODE_SIN] = 0, [OPCODE_SLE] = 0, [OPCODE_SLT] = 0, [OPCODE_SNE] = 0, @@ -766,7 +767,8 @@ ptn_emit_instruction(struct ptn_compile *c, struct prog_instruction *prog_inst) switch (op) { case OPCODE_RSQ: - ptn_move_dest(b, dest, nir_frsq(b, ptn_channel(b, src[0], X))); + ptn_move_dest(b, dest, + nir_frsq(b, nir_fabs(b, ptn_channel(b, src[0], X)))); break; case OPCODE_RCP: @@ -893,7 +895,7 @@ ptn_emit_instruction(struct ptn_compile *c, struct prog_instruction *prog_inst) break; default: - if (op_trans[op] != 0 || op == OPCODE_MOV) { + if (op_trans[op] != 0) { ptn_alu(b, op_trans[op], dest, src); } else { fprintf(stderr, "unknown opcode: %s\n", _mesa_opcode_string(op)); @@ -902,8 +904,8 @@ ptn_emit_instruction(struct ptn_compile *c, struct prog_instruction *prog_inst) break; } - if (prog_inst->SaturateMode) { - assert(prog_inst->SaturateMode == SATURATE_ZERO_ONE); + if (prog_inst->Saturate) { + assert(prog_inst->Saturate); assert(!dest.dest.is_ssa); ptn_move_dest(b, dest, nir_fsat(b, ptn_src_for_dest(c, &dest))); } @@ -925,11 +927,24 @@ ptn_add_output_stores(struct ptn_compile *c) foreach_list_typed(nir_variable, var, node, &b->shader->outputs) { nir_intrinsic_instr *store = nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_var); - store->num_components = 4; + store->num_components = glsl_get_vector_elements(var->type); store->variables[0] = nir_deref_var_create(store, c->output_vars[var->data.location]); - store->src[0].reg.reg = c->output_regs[var->data.location]; - nir_instr_insert_after_cf_list(c->build.cf_node_list, &store->instr); + + if (c->prog->Target == GL_FRAGMENT_PROGRAM_ARB && + var->data.location == FRAG_RESULT_DEPTH) { + /* result.depth has this strange convention of being the .z component of + * a vec4 with undefined .xyw components. We resolve it to a scalar, to + * match GLSL's gl_FragDepth and the expectations of most backends. + */ + nir_alu_src alu_src = { NIR_SRC_INIT }; + alu_src.src = nir_src_for_reg(c->output_regs[FRAG_RESULT_DEPTH]); + alu_src.swizzle[0] = SWIZZLE_Z; + store->src[0] = nir_src_for_ssa(nir_fmov_alu(b, alu_src, 1)); + } else { + store->src[0].reg.reg = c->output_regs[var->data.location]; + } + nir_builder_instr_insert(b, &store->instr); } } @@ -973,7 +988,7 @@ setup_registers_and_variables(struct ptn_compile *c) load_x->num_components = 1; load_x->variables[0] = nir_deref_var_create(load_x, var); nir_ssa_dest_init(&load_x->instr, &load_x->dest, 1, NULL); - nir_instr_insert_after_cf_list(b->cf_node_list, &load_x->instr); + nir_builder_instr_insert(b, &load_x->instr); nir_ssa_def *f001 = nir_vec4(b, &load_x->dest.ssa, nir_imm_float(b, 0.0), nir_imm_float(b, 0.0), nir_imm_float(b, 1.0)); @@ -989,7 +1004,7 @@ setup_registers_and_variables(struct ptn_compile *c) store->num_components = 4; store->variables[0] = nir_deref_var_create(store, fullvar); store->src[0] = nir_src_for_ssa(f001); - nir_instr_insert_after_cf_list(b->cf_node_list, &store->instr); + nir_builder_instr_insert(b, &store->instr); /* Insert the real input into the list so the driver has real * inputs, but set c->input_vars[i] to the temporary so we use @@ -1021,7 +1036,10 @@ setup_registers_and_variables(struct ptn_compile *c) reg->num_components = 4; nir_variable *var = rzalloc(shader, nir_variable); - var->type = glsl_vec4_type(); + if (c->prog->Target == GL_FRAGMENT_PROGRAM_ARB && i == FRAG_RESULT_DEPTH) + var->type = glsl_float_type(); + else + var->type = glsl_vec4_type(); var->data.mode = nir_var_shader_out; var->name = ralloc_asprintf(var, "out_%d", i); @@ -1064,22 +1082,25 @@ prog_to_nir(const struct gl_program *prog, { struct ptn_compile *c; struct nir_shader *s; + gl_shader_stage stage = _mesa_program_enum_to_shader_stage(prog->Target); c = rzalloc(NULL, struct ptn_compile); if (!c) return NULL; - s = nir_shader_create(NULL, options); + s = nir_shader_create(NULL, stage, options); if (!s) goto fail; c->prog = prog; - c->parameters = rzalloc(s, nir_variable); - c->parameters->type = glsl_array_type(glsl_vec4_type(), - prog->Parameters->NumParameters); - c->parameters->name = "parameters"; - c->parameters->data.read_only = true; - c->parameters->data.mode = nir_var_uniform; - exec_list_push_tail(&s->uniforms, &c->parameters->node); + if (prog->Parameters->NumParameters > 0) { + c->parameters = rzalloc(s, nir_variable); + c->parameters->type = + glsl_array_type(glsl_vec4_type(), prog->Parameters->NumParameters); + c->parameters->name = "parameters"; + c->parameters->data.read_only = true; + c->parameters->data.mode = nir_var_uniform; + exec_list_push_tail(&s->uniforms, &c->parameters->node); + } nir_function *func = nir_function_create(s, "main"); nir_function_overload *overload = nir_function_overload_create(func); @@ -1087,7 +1108,7 @@ prog_to_nir(const struct gl_program *prog, c->build.shader = s; c->build.impl = impl; - c->build.cf_node_list = &impl->body; + c->build.cursor = nir_after_cf_list(&impl->body); setup_registers_and_variables(c); if (unlikely(c->error))