X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;ds=sidebyside;f=src%2Fopenpower%2Fdecoder%2Fpower_enums.py;h=2eef375801e3aee0badac50711507da07c787506;hb=a67c21910a83dbd7abdcdd106c0bae2d78baf212;hp=9ec62380c11246b402cffffaae7d13f2ec4567cf;hpb=864d526726aa2ed5497ca6ebe4445a021e16ef9a;p=openpower-isa.git

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 9ec62380..2eef3758 100644
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -508,7 +508,7 @@ _insns = [
     "dcbf", "dcbst", "dcbt", "dcbtst", "dcbz",
     "divd", "divde", "divdeo", "divdeu",
     "divdeuo", "divdo", "divdu", "divduo",
-    "divrem2du",
+    "divmod2du",
     "divw", "divwe", "divweo",
     "divweu", "divweuo", "divwo", "divwu", "divwuo",
     "dsld", "dsrd",
@@ -541,7 +541,7 @@ _insns = [
     "lwz", "lwzcix", "lwzu", "lwzux", "lwzx",           # more load word
     # "lwabr",           # load word SVP64 bit-reversed
     # "lwzbr", "lwzubr", # more load word SVP64 bit-reversed
-    "madded",
+    "maddedu",
     "maddhd", "maddhdu", "maddld",                      # INT multiply-and-add
     "mcrf", "mcrxr", "mcrxrx", "mfcr/mfocrf",           # CR mvs
     "mfmsr", "mfspr",
@@ -698,8 +698,8 @@ class MicrOp(Enum):
     OP_FMVIS = 96
     OP_FISHMV = 97
     OP_PCDEC = 98
-    OP_MADDED = 99
-    OP_DIVREM2DU = 100
+    OP_MADDEDU = 99
+    OP_DIVMOD2DU = 100
     OP_DSHL = 101
     OP_DSHR = 102