X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=.gitmodules;h=26af8537e81648def9d1cdbb5059ba3b7fc4f5cd;hb=eda1a83ea991958ae98ea0e28f93d6be34271b5b;hp=9b5c03e8a5801f835bd1695dd58359e6659d825f;hpb=523377efbe4ccb965a1930c2138d6d64ab5cbbc0;p=litex.git

diff --git a/.gitmodules b/.gitmodules
index 9b5c03e8..26af8537 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,12 +1,18 @@
-[submodule "misoc/cores/lm32/verilog/submodule"]
-	path = misoc/cores/lm32/verilog/submodule
+[submodule "litex/soc/cores/cpu/lm32/verilog/submodule"]
+	path = litex/soc/cores/cpu/lm32/verilog/submodule
 	url = https://github.com/m-labs/lm32.git
-[submodule "misoc/cores/mor1kx/verilog"]
-	path = misoc/cores/mor1kx/verilog
+[submodule "litex/soc/cores/cpu/mor1kx/verilog"]
+	path = litex/soc/cores/cpu/mor1kx/verilog
 	url = https://github.com/openrisc/mor1kx.git
-[submodule "misoc/software/compiler_rt"]
-	path = misoc/software/compiler_rt
+[submodule "litex/soc/software/compiler_rt"]
+	path = litex/soc/software/compiler_rt
 	url = http://llvm.org/git/compiler-rt.git
-[submodule "misoc/software/unwinder"]
-	path = misoc/software/unwinder
-	url = https://github.com/whitequark/libunwind
+[submodule "litex/soc/cores/cpu/picorv32/verilog"]
+	path = litex/soc/cores/cpu/picorv32/verilog
+	url = https://github.com/cliffordwolf/picorv32
+[submodule "litex/build/sim/core/modules/ethernet/tapcfg"]
+	path = litex/build/sim/core/modules/ethernet/tapcfg
+	url = https://github.com/nizox/tapcfg
+[submodule "litex/soc/cores/cpu/vexriscv/verilog"]
+	path = litex/soc/cores/cpu/vexriscv/verilog
+	url = https://github.com/m-labs/VexRiscv-verilog.git