X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=3d_gpu.mdwn;h=15e4a32cb10d488652c4a5f4e3fcb39999a3685a;hb=626735e529d258a218a576e9b052a1e79993f25a;hp=4c1282bf43e27580e2c544281d8fca3ee4a174e1;hpb=e4eb759cbc77cf32f78d01f13e7d9e9d1f9285e8;p=libreriscv.git

diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
index 4c1282bf4..15e4a32cb 100644
--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -1,12 +1,16 @@
 # RISC-V 3D GPU / CPU / VPU
 
+Creating a trustworthy processor for the world.
+
 Note: this is a **hybrid** CPU, VPU and GPU.  It is not, as many news articles
-are implying, a "dedicated exclusive GPU".  The option exists to **create**
+are implying, a "dedicated exclusive GPU".  The option exists to *create*
 a stand-alone GPU product (contact us if this is a product that you want).
 Our primary goal is to design a **complete** all-in-one processor
-(System-on-a-Chip) that happens to include a libre-licensed VPU and GPU.
+(System-on-a-Chip) that happens to include libre-licensed VPU and GPU
+accelerated instructions as part of the actual - main - CPU itself.
 
-We seek investors, sponsors, engineers and potential customers, who are
+We seek investors, sponsors (whose contributions thanks to NLNet may be
+tax-deductible), engineers and potential customers, who are
 interested, as a first product, in the creation and use of an entirely
 libre low-power mobile class system-on-a-chip.  Comparative benchmark
 performance, pincount and price is the Allwinner A64, except that the
@@ -27,22 +31,14 @@ the cost of product development when it comes to PCB design and layout:
 We can look at larger higher-power ASICs either later or, if funding
 is made available, immediately.
 
-Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, single core dual issue, around 300 to 350mhz.  This will provide the confidence to go to higher geometries, as well as be a commercially viable embedded product in its own right.
+Recent applications to NLNet (Oct 2019) are for a test chip in 180nm,
+64 bit, single core dual issue, around 300 to 350mhz.  This will provide
+the confidence to go to higher geometries, as well as be a commercially
+viable embedded product in its own right.
 
 # Business Objectives
 
-* the project shall be a hybrid CPU-GPU because if it is not, the
-  complexity involved in developing a split shared-memory CPU-GPU both
-  at a hardware and a software level will be so costly it will jeapordise
-  the project.
-* the project shall be commercial and mass-volume (100 million units
-  and above)
-* the project shall be entirely transparent so that end-users will be
-  able to trust it
-* the source code shall be available at all times for all components
-  for BUSINESS reasons, making development and use of SDKs dead simple
-  and aiding and assisting developers AND BUSINESSES in debugging and thus
-  hugely saving them money.
+See [[3d_gpu/business_objectives]]
 
 # Links:
 
@@ -51,6 +47,7 @@ Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, si
 * [[resources]]
 * [[overview]]
 * [[3d_gpu/funding]]
+* [[3d_gpu/architecture]]
 * Founding [[charter]]
 * Mailing list <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
 * Crowdsupply page <https://www.crowdsupply.com/libre-risc-v/m-class>
@@ -61,9 +58,11 @@ Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, si
 * [NLNet 2019 Milestones](http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02)
 * NLNet Project Page <https://nlnet.nl/project/Libre-RISCV/>
 * [[nlnet_proposals]]
+* [[llvm]]
 
 # Progress:
 
+* Jan 2020: New team members, Yehowshua and Michael.  Last-minute attendance of FOSDEM2020
 * Dec 2019: Second round NLNet questions answered.  External Review completed.  6 NLNet proposals accepted (EUR 200,000+)
 * Nov 2019: Alternative FP library to Berkeley softfloat developed. NLNet first round questions answered.
 * Oct 2019: 3D Standards continued.  POWER ISA considered.  Open 3D Alliance begins.  NLNet funding applications submitted.
@@ -110,6 +109,7 @@ Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, si
 * <https://www.reddit.com/r/RISCV/comments/db04j3/libreriscv_3d_cpugpu_seeks_grants_for_ambitious/>
 * <https://hardware.slashdot.org/story/19/09/29/1845252/libre-risc-v-3d-cpugpu-seeks-grants-for-ambitious-expansion>
 * <https://forums.puri.sm/t/risc-v-m-class-effort-and-purism-donation/6528/15>
+* <https://www.pro-linux.de/news/1/27527/comm/1/show-all-comments.html>
 
 # Information Resources and Tutorials
 
@@ -151,4 +151,4 @@ Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, si
 
 # Evaluations
 
-*[[openpower]]
+* [[openpower]]