X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=3d_gpu.mdwn;h=90688c7e387ad812a449f2b2d5e08d5ac55010ad;hb=81166e74eba3bbcdc89a726dbf19e21f6b86e8f7;hp=4c1282bf43e27580e2c544281d8fca3ee4a174e1;hpb=e4eb759cbc77cf32f78d01f13e7d9e9d1f9285e8;p=libreriscv.git

diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
index 4c1282bf4..90688c7e3 100644
--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -1,12 +1,18 @@
-# RISC-V 3D GPU / CPU / VPU
+# Hybrid 3D GPU / CPU / VPU
+
+Creating a trustworthy processor for the world.
+
+Our [[3d_gpu/business_objectives]]
 
 Note: this is a **hybrid** CPU, VPU and GPU.  It is not, as many news articles
-are implying, a "dedicated exclusive GPU".  The option exists to **create**
+are implying, a "dedicated exclusive GPU".  The option exists to *create*
 a stand-alone GPU product (contact us if this is a product that you want).
 Our primary goal is to design a **complete** all-in-one processor
-(System-on-a-Chip) that happens to include a libre-licensed VPU and GPU.
+(System-on-a-Chip) that happens to include libre-licensed VPU and GPU
+accelerated instructions as part of the actual - main - CPU itself.
 
-We seek investors, sponsors, engineers and potential customers, who are
+We seek investors, sponsors (whose contributions thanks to NLNet may be
+tax-deductible), engineers and potential customers, who are
 interested, as a first product, in the creation and use of an entirely
 libre low-power mobile class system-on-a-chip.  Comparative benchmark
 performance, pincount and price is the Allwinner A64, except that the
@@ -27,43 +33,15 @@ the cost of product development when it comes to PCB design and layout:
 We can look at larger higher-power ASICs either later or, if funding
 is made available, immediately.
 
-Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, single core dual issue, around 300 to 350mhz.  This will provide the confidence to go to higher geometries, as well as be a commercially viable embedded product in its own right.
-
-# Business Objectives
-
-* the project shall be a hybrid CPU-GPU because if it is not, the
-  complexity involved in developing a split shared-memory CPU-GPU both
-  at a hardware and a software level will be so costly it will jeapordise
-  the project.
-* the project shall be commercial and mass-volume (100 million units
-  and above)
-* the project shall be entirely transparent so that end-users will be
-  able to trust it
-* the source code shall be available at all times for all components
-  for BUSINESS reasons, making development and use of SDKs dead simple
-  and aiding and assisting developers AND BUSINESSES in debugging and thus
-  hugely saving them money.
-
-# Links:
-
-* [[shakti/m_class/libre_3d_gpu]]
-* [[discussion]]
-* [[resources]]
-* [[overview]]
-* [[3d_gpu/funding]]
-* Founding [[charter]]
-* Mailing list <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
-* Crowdsupply page <https://www.crowdsupply.com/libre-risc-v/m-class>
-* Wiki <https://libre-riscv.org>
-* Git repositories <https://git.libre-riscv.org>
-* Bugtracker <http://bugs.libre-riscv.org>
-* Kazan Vulkan Driver (including 3D engine) <https://salsa.debian.org/Kazan-team/kazan>
-* [NLNet 2019 Milestones](http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02)
-* NLNet Project Page <https://nlnet.nl/project/Libre-RISCV/>
-* [[nlnet_proposals]]
+Recent applications to NLNet (Oct 2019) are for a test chip in 180nm,
+64 bit, single core dual issue, around 300 to 350mhz.  This will provide
+the confidence to go to higher geometries, as well as be a commercially
+viable embedded product in its own right. Tapeout deadline is Oct 2020.
 
 # Progress:
 
+* Feb 2020: OpenPower Foundation EULA released. Coriolis2 Layout experimentation begun. Dynamic Partitioned SIMD ALU created.
+* Jan 2020: New team members, Yehowshua and Michael.  Last-minute attendance of FOSDEM2020
 * Dec 2019: Second round NLNet questions answered.  External Review completed.  6 NLNet proposals accepted (EUR 200,000+)
 * Nov 2019: Alternative FP library to Berkeley softfloat developed. NLNet first round questions answered.
 * Oct 2019: 3D Standards continued.  POWER ISA considered.  Open 3D Alliance begins.  NLNet funding applications submitted.
@@ -110,9 +88,14 @@ Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, si
 * <https://www.reddit.com/r/RISCV/comments/db04j3/libreriscv_3d_cpugpu_seeks_grants_for_ambitious/>
 * <https://hardware.slashdot.org/story/19/09/29/1845252/libre-risc-v-3d-cpugpu-seeks-grants-for-ambitious-expansion>
 * <https://forums.puri.sm/t/risc-v-m-class-effort-and-purism-donation/6528/15>
+* Dec 2019 ProLinux <https://www.pro-linux.de/news/1/27527/comm/1/show-all-comments.html>
+* Dec 2019 Phoronix <https://www.phoronix.com/forums/forum/hardware/graphics-cards/1148553-libre-risc-v-accelerator-secures-300k-eur-in-grants-still-undecided-about-the-isa/>
+* Feb 15 2020 Phoronix <https://www.phoronix.com/scan.php?page=news_item&px=OpenPOWER-ISA-EULA-Draft/>
+* Feb 15 2020 Slashdot OpenPOWER article <https://news.slashdot.org/story/20/02/16/1743222/openpower-foundation-releases-eula-for-power-isa>
 
 # Information Resources and Tutorials
 
+* Fundamentals to learn to get started [[3d_gpu/tutorial]]
 * <https://github.com/timvideos/litex-buildenv/wiki/LiteX-for-Hardware-Engineers>
 * <https://jeffrey.co.in/blog/2014/01/d-flip-flop-using-migen/>
 * <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-March/000705.html>
@@ -151,4 +134,4 @@ Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, si
 
 # Evaluations
 
-*[[openpower]]
+* [[openpower]]