X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=3d_gpu.mdwn;h=ef465717b76a69c99cb3917228975d9b2e6260f4;hb=b181e8fe576c4dc186b75e13c262a20b0b90e55a;hp=3a7d58962897c513447fb70bc614cb98a36eccd9;hpb=fd752349b089c12b6ee4a3e3edf556814a1bff6f;p=libreriscv.git

diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
index 3a7d58962..ef465717b 100644
--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -1,4 +1,4 @@
-See architectural details [here](./architecture)
+See architectural details [here](./architecture) and [[gaddie]] pitch
 
 # Hybrid 3D GPU / CPU / VPU
 
@@ -45,6 +45,8 @@ See [[3d_gpu/articles]] online.
 
 # Progress:
 
+* Oct 2020 [[180nm_Oct2020/ls180/]] pinouts decided, code-freeze initiated
+  for 180nm test ASIC, GDSII deadline set of Dec 2nd.
 * Sep 2020: [first boot](https://youtu.be/72QmWro9BSE) of Litex BIOS on a Versa ECP5 at 55mhz.  DDR3 RAM initialisation successful. 180nm ASIC pinouts started [[180nm_Oct2020/ls180]]
 * Aug 2020: [first boot](https://libre-soc.org/3d_gpu/libresoc_litex_bios_first_execution_2020-08-06_16-15.png) of litex BIOS in verilator simulation
 * Jul 2020: first ppc64le "hello world" binary executed.  80,000 gate coriolis2 auto-layout completed with 99.98% routing. Wishbone MoU signed making available access to an additional EUR 50,000 donations from NLNet. XDC2020 and OpenPOWER conference submissions entered.