X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=45nm_Fall2022.mdwn;h=a73ed396e80e9c17dec382a624d1c7ff19287777;hb=11fdc4850323d4e0fe7420851d5c214a03abcb8b;hp=cc0d91695d5cf6e9b99fca5d76b4114cb089fc43;hpb=1bc81cbd767a9b7ace15edb28e5f355f0a7885a9;p=libreriscv.git

diff --git a/45nm_Fall2022.mdwn b/45nm_Fall2022.mdwn
index cc0d91695..a73ed396e 100644
--- a/45nm_Fall2022.mdwn
+++ b/45nm_Fall2022.mdwn
@@ -1,12 +1,24 @@
 # Specs for 2022 SOC
 
+## Applications
+
+ - We are providing open source drivers for the GPU,
+hopefully completed by Fall 2022.
+ - Given that POWER CPUs do not have GPUs, RaptorCS
+would like the LibreSOC to be able function as a
+discrete GPU in PCIE slave mode for POWER9 CPUs.
+ - Lastly, RaptorCS would like to manufacture single
+board computers.
+
 ## Devices
  - 4 Core POWER CPU
- - SimpleV GPU
-   - Also enable frame buffer slave mode to allow outputting to [BMC](https://www.aspeedtech.com/products.php?fPath=20&rId=440) for debugging
+ - SimpleV Capability and GPU Instructions
  - IOMMU
  - Coherent Accelerator Processor Proxy (CAPP) functional unit
- - PCIE host Controller
+ - PCIe host Controller
+ - PCIe Slave controller(RaptorCS wants to use LibreSOC as a GPU on their POWER mobos)
+ - BMC - enables LibreSOC to become a discrete GPU with video output and ethernet.
+ - RGB/TTL framebuffer VGA/LCD PHY from Richard Herveille, RoaLogic.
 
 ## Interfaces
 
@@ -15,8 +27,8 @@
  - SERDES - 10rx, 14tx
    - 4tx, 4rx for [OMI(DDR4](https://openpowerfoundation.org/wp-content/uploads/2018/10/Jeff-Steuchli.OpenCAPI-OPS-OMI.pdf) on top of SERDES with OpenCAPI protocol) @5GHz
    - 2tx, 2rx for ethernet
-   - 4tx, 4rx for PCIE and other CAPI devices
-   - 3tx for HDMI
+   - 4tx, 4rx for PCIe and other CAPI devices
+   - 3tx for HDMI (note: requires HDMI Trademark Licensing and Compliance Testing)
  - [OpenFSI](https://openpowerfoundation.org/?resource_lib=field-replaceable-unit-fru-service-interface-fsi-openfsi-specification) instead of JTAG
    - [Raptor HDL](https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga)
    - [Raptor Libsigrok](https://gitlab.raptorengineering.com/raptor-engineering-public/dsview/-/tree/master/libsigrokdecode4DSL/decoders/fsi)
@@ -34,6 +46,7 @@ These should be easily doable with LiteX.
 * [[shakti/m_class/QSPI]]
 * [[shakti/m_class/LPC]]
 * [[shakti/m_class/EINT]]
+* [[shakti/m_class/RGBTTL]] in conjunction with TI TFP410a or Chrontel converter
 
 ## Protocols
  - IPMT over i2c to talk to the BMC