X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=The_Mission.mdwn;h=ca46581956ae735421de4209b44976ab86b7a7aa;hb=474c45a232daacc3e2c9dc9acc553415ee38fc61;hp=c817086cf2764d6297b9620dc4e0b137778e007b;hpb=49f625f11658d69145570a9bc9788cae0db1735f;p=libreriscv.git

diff --git a/The_Mission.mdwn b/The_Mission.mdwn
index c817086cf..ca4658195 100644
--- a/The_Mission.mdwn
+++ b/The_Mission.mdwn
@@ -1,3 +1,5 @@
+# Trustable Hardware
+
 > We believe a computer should be safe to use, and this starts with a
 > safe processor.
 
@@ -26,7 +28,7 @@ To accomplish this we:
 # The Means:
 
 - provide the customer the **freedom to study, modify, and redistribute**
-  the full SoC source from HDL and boot loader to down to the VLSI.
+  the full SoC source, from HDL, through BIOS, boot loader, to drivers and OS.
 - engage in **full transparency** at every level of the development,
   right from the inception through to delivery of silicon.  no exceptions.
 - listen to **constructive input** from world-leading industry experts,
@@ -44,9 +46,9 @@ To accomplish this we:
  - CV capable flight controller for lightweight drones
  - whatever you want
 
-# The Machines:
+# The Products:
 
-- our first target (Oct 2020): a single-core dual-issue 180nm 64-bit
+- our first target (Dec 2020): a single-core dual-issue 180nm 64-bit
   "demo" QFP chip that will also be a saleable product in the "Embedded"
   space (Arduino, STM32F, Ingenic jz4720).
 - a full quad core SoC: 800mhz, dual issue, 4-wide FP32, Hybrid CPU /