X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=about_us.mdwn;h=3c8345dffa2d203b4ecfd4488332900c276c4e89;hb=ddbbe64186617615ed1320fa9a80270b8a71da6a;hp=ec725990a9d2b0b10d62313f6efde4736fa98692;hpb=be6a491cc118981e41db907dc16798d1c906c99a;p=libreriscv.git diff --git a/about_us.mdwn b/about_us.mdwn index ec725990a..3c8345dff 100644 --- a/about_us.mdwn +++ b/about_us.mdwn @@ -4,15 +4,6 @@ These are our current members Also, check out [[The_Mission]]. -## Yehowshua Immanuel - -* Experience in HDL projects, PCB design, and drivers -* Interests: Compilers, HDL Tooling, Signal Processing, Mathematics, - Electromagnetics -* Website: [[https://yehowshuaimmanuel.com]] -* Github: [[https://github.com/BracketMaster]] -* Availability: 6hrs/wk - ## [[Luke Kenneth Casson Leighton|lkcl]] * Hardware Experience: assembly-level programming, gate-level @@ -22,7 +13,7 @@ Also, check out [[The_Mission]]. * Ethical Technology Specialist. Identifies socio-economic imbalances and works out if there's an ethical way in which technology can help. If that technology doesn't exist, creates it. -* Interests: varied and including particle physics and poetry. +* Interests: varied and including particle physics, Medieval and Folk music, and writing poems. * website: [[http://lkcl.net]] * github: doesn't have one (because github is a proprietary non-free service), runs his own git servers, manages projects (several), entirely in a libre @@ -32,11 +23,11 @@ Also, check out [[The_Mission]]. ## [[Jacob Lifshay|programmerjake]] * FOSS Software Developer, Hardware Designer, Original Author of Kazan (one of our GPU drivers, also a software-rendered Vulkan implementation that works on most CPUs) -* Built a working RV32I CPU and VGA core that runs a 3D game in 3 weeks: https://github.com/programmerjake/rv32 +* Built a working RV32I CPU and VGA core that runs a 3D game in 3 weeks: [[https://github.com/programmerjake/rv32]] * Built an algebraic numbers library: https://crates.io/crates/algebraics -* Built a (non-official) reference implementation of IEEE 754-2019 (binary floating-point): https://crates.io/crates/simple-soft-float +* Built a (non-official) reference implementation of IEEE 754-2019 (binary floating-point): [[https://crates.io/crates/simple-soft-float]] * Interests: Computer Graphics, Compilers, Simulation, Rust-lang, Anime, Astrophysics, Electronics, Computer Design, Chemistry, Nuclear Physics, Cellular Automatons, Video Game Software Engineering, High-performance Computing -* GitHub: https://github.com/programmerjake +* GitHub: [[https://github.com/programmerjake]] * Availability: full-time ## [[Tobias Platen|tplaten]] @@ -46,7 +37,7 @@ Also, check out [[The_Mission]]. * website: [[https://www.platen-software.de/tobias/]] * github: doesn't have one using notabug instead [[https://notabug.org/isengaara]] -* Availability: >20 hrs/wk +* Availability: Outside normal working hours. ## Yann Guidon (whygee) @@ -60,23 +51,14 @@ Also, check out [[The_Mission]]. compression, signal processing (sound & picture), optimisations, design for test... -## [[Michael Nolan|mnolan]] - -* Experience/Interests: Hardware design, compiler design, formal - verification, low level/embedded programming, RF electronics, amateur - radio. -* Website: [[https://n4abi.com]] -* Github: [[https://github.com/C-Elegans]] -* Availability: ~10hrs/wk (mostly MWF 9am-12pm Eastern Time) - -## Lauri Kasanen +## [[Lauri Kasanen|lauri]] * Embedded software engineer * Interests: niche platforms, embedded, servers, graphics * github: [[https://github.com/clbr]] * Availability: part-time -## Veera Kumar +## [[Veera Kumar|veera]] * Software developer, programmer and small system administrator * Knowledge in using Redhat, Fedora, Debian and few others @@ -84,4 +66,160 @@ Also, check out [[The_Mission]]. * Experience in Shell, C, Awk, Perl, Python, Lua, HTML, CSS, PHP * Develop websites, run VPS on Linux * Build open source softwares from source and test and use it +* Website [[http://www.vkten.in]] * Availability: part-time + +## [[Jock Tanner|jock_tanner]] + +* Expertise: Python developer, full-stack web developer (6+ years) +* My code: [[https://github.com/dmelnichuk/]], [[https://github.com/jock-tanner/]] +* GNU/Linux user/administrator +* Hobbies: electronics, real-time systems, digital music & sound processing, embedded systems, FPGA, retro computing +* Availability: ~20hrs/week +* Time zone: UTC+10:00 + +## [[Alain Williams|addw]] + +Alain's website: + +## [[Cesar Strauss|Cesar_Strauss]] + +* Experience: Data acquisition and control for scientific instruments +* Programming of microcontrolers and FPGAs +* Digital circuit design +* Availability: Outside normal working hours. + +## [[Cole Poirier|cole]] + +* Trying to learn and organize stuff +* GitHub: [[https://github.com/colepoirier]] +* Availability: full-time + +## [[Sanjay A Menon|Sanjay]] + +* Skills: Verilog, C/C++, Python, TCL & PERL +* Github Profile: [[https://github.com/Sanjay-A-Menon]] +* LinkedIn Profile: [[https://www.linkedin.com/in/sanjay-menon-91791815a]] +* Availability: ~6hrs/week + +## [[Samuel A Falvo II]] + +* Experience in amateur HDL projects (Kestrel-3 homebrew computer + concept; VDC-II core), Verilog (but not System Verilog), newbie at PCB + design. Extensive experience with test-driven development, Python, + assembly language for a wide variety of CPUs including RISC-V, and Forth. + Very comfortable with nMigen, but still learning things. +* Interests: Forth, Common Lisp, Scheme, assembly language, + {Astro|Semiconductor-}physics, astronomy, martial arts, furry (character: black dragon; name: "Vertigo"). +* Websites: + - https://hackaday.io/project/170581-vdc-ii , + - https://kestrelcomputer.github.io/kestrel/ , + - http://chiselapp.com/user/kc5tja/repository/kestrel-3/index +* Public Repositories: + - https://github.com/sam-falvo , + - https://github.com/kestrelcomputer +* Availability: approximately 20 hrs/wk, circumstances permitting. + +## [[Alex Oliva|lxo]] + +* Experience: GCC, binutils, glibc, GNU autotools, Free Software activism. +* website: [[https://www.fsfla.org/~lxoliva/]] +* Availability: 10+hrs/week + +## [[Richard Wilbur|rwilbur]] + +* Interests: Libre in hardware and software, low-power, efficiency +* Hardware Experience: High-speed digital(comb. & FSM), PLD(PALASM), FPGA(VHDL), low-power, analog video, I2C, DDC, PCI, RS-232/422/485, SOC board bring-up, PCB layout, VLSI gate design +* Software Experience: optimization, 3D geometry transformations, simulation, atomic & multi-threaded, PCI auto-configuration, drivers (serial HW, MPEG encoder/decoder(TS generation/consumption), GPS), OpenGL vertex shader, SQL db, network protocol design, test-driven dev, PCI BIOS, fixed-point division +* Languages: C, C++, Python, asm, bash, PERL, BASIC, Forth, ruby +* Architectures: 6502/10, 68k, x86_64, PPC, i960, SPARC +* Website: [[https://launchpad.net/~richard-wilbur]] +* Availability: 10+hrs/week, more is negotiable +* Timezone: UTC-07:00 (DST UTC-06:00, 2nd Sun of Mar-1st Sun of Nov) + +## [[Mikolaj Wielgus|mikolajw]] + +* Interests: Libre software and hardware, analog circuits, RF and microwave circuits, nonlinear systems, oscillators +* Hardware Experience: PCB schematic and layout design, very small amount of IC design +* Software Experience: Data acquisition and processing (LXI, SCPI), GUI development (wxWidgets), Microcontroller programming (AVR, STM32), video game development (Love2D, SDL) +* Languages: Verilog, Asm (AVR), C, C++, C#, D, Python, Octave, Lua, Java, or any other language involving a similar set of abstractions +* GitLab: https://gitlab.com/mwielgus +* Most of my skills are self-taught by making small amateur projects. I have only little industry experience. +* Availability: ~6 hrs/week +* Timezone: UTC+01:00 + +## Object Automation + +### [[oa/madan]] + +* Interests: Programming in Python and Knowledge of ML algorithms and NLP +* Availability: 5 hours per week +* Statistician + + +### [[oa/gautham]] + +* Interests: Digital System Design, PCB Layout, Programming, Machine Learning +* Programming Languages: Verilog, C, C++, Python +* Availability: ~8-10 hours/week + +### [[oa/adithya]] + +* Interests:Digital System Design,PCB layout, Programming, Machine Learning, IoT +* Programming Languages: Verilog, C, C++, Java, Python3, Julia +* Availability: ~10hrs per week + +### [[oa/Niranjan]] + +* Interests: Digital System Design, PCB Layout, Programming +* Programming Languages: Verilog, C, C++, Python +* Availability: ~8-10 hours/week + +### [[oa/Abhishek]] + +* Interests: HPC, embedded systems, Digital system design +* Programming Languages: C, Python, Java, VHDL +* Availability: ~8-10 hours/week + +### [[oa/Sukhanshu D]] + +* Experience: SOC Verification Intern, Digital Design +* Programming Languages: Python, Verilog, Ng-spice +* Availability: 4-6 hours per week + +### [[oa/Mehul N]] + +* Interests: Digital Design, Verification, IC Fabrication +* Programming Languages: Verilog, System Verilog, UVM +* Availability: ~ 6-8 hours/week +* Experience: SoC Verification Intern, Research Intern at KIS + +## 3mdeb + +### [[Dmitry Selyutin|3mdeb/ghostmansd]] + +* Interests: OS development, fishing, classical antiquity +* Languages: C, C++, Python +* FW experience: system programming +* Availability: depends on a week (0..10+hrs/week) + +## [[Kyle Lehman|klehman]] + +* Languages: C/C++, Java, Python, SQL, assembly +* Interests: Language design, microacrhitecture, OS design, emulation, 3D computation +* Other interests: Nearly anything that floats, flies, or has an engine with wheels + +## [[Andrey Miroshnikov|andreym]] +* Languages: C, Python, Verilog +* Interests: Analogue/digital electronics, RF, mobile comms, compilers, FPGAs, discrete mathematics, microarchitecture, Unix OSs, PCB design +* Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium) +* Other interests: Lingua Latina, Philosophy, History +* Availability: Full-time +* IRC: octavius + +## [[Manikandan Nagarajan|Manik]] + +* Languages: Verilog HDL, VHDL, C, Python & TCL +* Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. +* LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]] +* Availability: 8~10hrs/week