X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=arch%2Falpha%2Farguments.cc;h=adc371682ea5e0b5d2afd2c16b2eff580e69d29f;hb=86777c9db174c74be49667bce3dda99f8ba23696;hp=905d6b9ae11193370c543c400d4e7116b8a78676;hpb=42f3b4ffb3fedcb70e9ff068ed7160dc6020b8c4;p=gem5.git

diff --git a/arch/alpha/arguments.cc b/arch/alpha/arguments.cc
index 905d6b9ae..adc371682 100644
--- a/arch/alpha/arguments.cc
+++ b/arch/alpha/arguments.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -29,7 +29,9 @@
 #include "arch/alpha/arguments.hh"
 #include "arch/alpha/vtophys.hh"
 #include "cpu/exec_context.hh"
-#include "mem/functional_mem/physical_memory.hh"
+#include "mem/vport.hh"
+
+using namespace AlphaISA;
 
 AlphaArguments::Data::~Data()
 {
@@ -52,13 +54,15 @@ AlphaArguments::getArg(bool fp)
 {
     if (number < 6) {
         if (fp)
-            return xc->regs.floatRegFile.q[16 + number];
+            return xc->readFloatRegBits(16 + number);
         else
-            return xc->regs.intRegFile[16 + number];
+            return xc->readIntReg(16 + number);
     } else {
-        Addr sp = xc->regs.intRegFile[30];
-        Addr paddr = vtophys(xc, sp + (number-6) * sizeof(uint64_t));
-        return xc->physmem->phys_read_qword(paddr);
+        Addr sp = xc->readIntReg(30);
+        VirtualPort *vp = xc->getVirtPort(xc);
+        uint64_t arg = vp->read<uint64_t>(sp + (number-6) * sizeof(uint64_t));
+        xc->delVirtPort(vp);
+        return arg;
     }
 }