X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=bfd%2Fcpu-ia64-opc.c;h=01e3c3f476aaec9f28af1c43b3a8ded8811c2a37;hb=07b7571ebca8e037ac6d3bdc30615fd3e0cbdc48;hp=dcc318e679d57ed506e20146f2cc0d42c0de20ec;hpb=b3e14edafcdc558d724452ee5b803ff096c32d0f;p=binutils-gdb.git diff --git a/bfd/cpu-ia64-opc.c b/bfd/cpu-ia64-opc.c index dcc318e679d..01e3c3f476a 100644 --- a/bfd/cpu-ia64-opc.c +++ b/bfd/cpu-ia64-opc.c @@ -1,5 +1,4 @@ -/* Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2009 - Free Software Foundation, Inc. +/* Copyright (C) 1998-2022 Free Software Foundation, Inc. Contributed by David Mosberger-Tang This file is part of BFD, the Binary File Descriptor library. @@ -87,7 +86,7 @@ ins_immu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i) { new_insn |= ((value & ((((ia64_insn) 1) << self->field[i].bits) - 1)) - << self->field[i].shift); + << self->field[i].shift); value >>= self->field[i].bits; } if (value) @@ -100,14 +99,14 @@ ins_immu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) static const char* ext_immu (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) { - BFD_HOST_U_64_BIT value = 0; + uint64_t value = 0; int i, bits = 0, total = 0; for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i) { bits = self->field[i].bits; value |= ((code >> self->field[i].shift) - & ((((BFD_HOST_U_64_BIT) 1) << bits) - 1)) << total; + & (((uint64_t) 1 << bits) - 1)) << total; total += bits; } *valuep = value; @@ -162,7 +161,7 @@ static const char* ins_imms_scaled (const struct ia64_operand *self, ia64_insn value, ia64_insn *code, int scale) { - BFD_HOST_64_BIT svalue = value, sign_bit = 0; + int64_t svalue = value, sign_bit = 0; ia64_insn new_insn = 0; int i; @@ -171,7 +170,7 @@ ins_imms_scaled (const struct ia64_operand *self, ia64_insn value, for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i) { new_insn |= ((svalue & ((((ia64_insn) 1) << self->field[i].bits) - 1)) - << self->field[i].shift); + << self->field[i].shift); sign_bit = (svalue >> (self->field[i].bits - 1)) & 1; svalue >>= self->field[i].bits; } @@ -187,20 +186,20 @@ ext_imms_scaled (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep, int scale) { int i, bits = 0, total = 0; - BFD_HOST_64_BIT val = 0, sign; + uint64_t val = 0, sign; for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i) { bits = self->field[i].bits; val |= ((code >> self->field[i].shift) - & ((((BFD_HOST_U_64_BIT) 1) << bits) - 1)) << total; + & (((uint64_t) 1 << bits) - 1)) << total; total += bits; } /* sign extend: */ - sign = (BFD_HOST_64_BIT) 1 << (total - 1); + sign = (uint64_t) 1 << (total - 1); val = (val ^ sign) - sign; - *valuep = (val << scale); + *valuep = val << scale; return 0; } @@ -313,7 +312,7 @@ static const char* ins_cnt (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) { --value; - if (value >= ((BFD_HOST_U_64_BIT) 1) << self->field[0].bits) + if (value >= (uint64_t) 1 << self->field[0].bits) return "count out of range"; *code |= value << self->field[0].shift; @@ -324,7 +323,7 @@ static const char* ext_cnt (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) { *valuep = ((code >> self->field[0].shift) - & ((((BFD_HOST_U_64_BIT) 1) << self->field[0].bits) - 1)) + 1; + & (((uint64_t) 1 << self->field[0].bits) - 1)) + 1; return 0; } @@ -422,8 +421,8 @@ ext_strd5b (const struct ia64_operand *self, ia64_insn code, static const char* ins_inc3 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) { - BFD_HOST_64_BIT val = value; - BFD_HOST_U_64_BIT sign = 0; + int64_t val = value; + uint64_t sign = 0; if (val < 0) { @@ -445,7 +444,7 @@ ins_inc3 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) static const char* ext_inc3 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) { - BFD_HOST_64_BIT val; + int64_t val; int negate; val = (code >> self->field[0].shift) & 0x7; @@ -658,7 +657,7 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = "a branch target" }, { REL, ins_imms4, ext_imms4, 0, {{20, 13}, { 1, 36}}, 0, /* TGT25c */ "a branch target" }, - { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */ + { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */ "a branch target" }, { ABS, ins_const, ext_const, 0, {{0, 0}}, 0, /* LDXMOV */