X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=cole.mdwn;h=dbc8a7154dd5481205f031e9b32afde2293c4d1f;hb=1c6df3ff382c860d318fae98b4b8035a5c9fd605;hp=2602f48d1c764df00fee40e3980179d2c131f035;hpb=793815d827fc920d43adc3e918021f2a50c56b7b;p=libreriscv.git diff --git a/cole.mdwn b/cole.mdwn index 2602f48d1..dbc8a7154 100644 --- a/cole.mdwn +++ b/cole.mdwn @@ -1,3 +1,88 @@ # Cole Poirier -* [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=colepoirier%40gmail.com&emailassigned_to1=1&emailtype1=substring&resolution=---) +Apprentice and assistant Project coordinator for Libre-SOC + +* [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=colepoirier%40gmail.com&emailassigned_to1=1&emailcc1=1&emailtype1=substring&resolution=---) + +# Status tracking + +move things along from one stage to the next + +## Currently working on + +- Reach out to lu_zero of Gentoo about SV POWER binutils +- Script and document the setup and installation of microwatt dependency on the wiki-HDL_workflow page +- MUL tests + - shared with lkcl +- Write VHDL to expose CR and XER from Microwatt so single-stepping is possible + - shared with lkcl +- Create I-Cache from microwatt icache.vhdl + - shared with lkcl +- Create D-cache from microwatt dcache.vhdl + - shared with lkcl +- Create MMU from microwatt mmu.vhdl + - shared with lkcl +- Recruiting more engineers to the project +- First round of recruitment attempts +- Create wiki page for recruitment emails to point to +- bpermd tutorial +- Create bug report for each diagram to be converted to SVG +- Contact 'BlackParrot' RV64GC Multicore SoC devs +- Convert comp_unit_req_rel diagram to SVG + +## List of things that need more fleshed out bug reports: + +- Scoreboard documentation + - + + +- LDST documentation + - + + +## Completed but not yet submitted + +## Submitted for NLNet RFP + +submitted but not confirmed paid: + +## Paid + +### MOU coriolis2 2019-10-029, received payment on 2021-MAY-5 + +- determine SRAM block size and implement it + - EUR 50 + +### MOU wishbone 2019-10-043, received payment on 2021-MAY-5 + +- DMI JTAG TAP needed + - EUR 150 + +### MOU coriolis2 2019-10-029, received payment on 2020-DEC-20 + +- Coriolis2 tutorial + - EUR 500 + +### MOU wishbone 2019-10-043, received payment on 2020-OCT-01 + +- Convert 180nm Test ASIC Mem Layout diagram to SVG + - EUR 150 + +- Adding nmigen-soc as a dependency needs documentation updated + - EUR 100 + +- Tutorial and dev page needed for mesa driver + - EUR 100 + +- Trap pipe discussion + - EUR 500. shared. lkcl (60%, EUR 300), cole (20%, EUR 100), samuel (20%, EUR 100) + +- Virtual Regfile port + - EUR 200. shared, lkcl (50%, EUR 100), cole (50%, EUR 100) + +### MOU coriolis2 2019-10-029, received payment on 2020-OCT-01 + +- Coriolis2 documentation and setup scripts, (documentation budget, EUR 200) + - + - + -