X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=configs%2Fexample%2Fse.py;h=67a2340cee2a2cded50ea667c5d74f8dffc6e83e;hb=15bb2480135d7192f895cfb8a3a945fa24472037;hp=d1d19eebc5fc0b1068011ebe25a32b908d698a90;hpb=91c76278b95f74a7a237ba9d89ad2818c2e20a4d;p=gem5.git diff --git a/configs/example/se.py b/configs/example/se.py index d1d19eebc..67a2340ce 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -1,4 +1,4 @@ -# Copyright (c) 2006 The Regents of The University of Michigan +# Copyright (c) 2006-2008 The Regents of The University of Michigan # All rights reserved. # # Redistribution and use in source and binary forms, with or without @@ -31,24 +31,36 @@ # "m5 test.py" import m5 + +if m5.build_env['FULL_SYSTEM']: + m5.fatal("This script requires syscall emulation mode (*_SE).") + from m5.objects import * import os, optparse, sys +from os.path import join as joinpath m5.AddToPath('../common') -from FullO3Config import * +import Simulation +from Caches import * +from cpu2000 import * + +# Get paths we might need. It's expected this file is in m5/configs/example. +config_path = os.path.dirname(os.path.abspath(__file__)) +config_root = os.path.dirname(config_path) +m5_root = os.path.dirname(config_root) parser = optparse.OptionParser() +# Benchmark options parser.add_option("-c", "--cmd", - default="../../tests/test-progs/hello/bin/alpha/linux/hello", - help="The binary to run in syscall emulation mode.") + default=joinpath(m5_root, "tests/test-progs/hello/bin/alpha/linux/hello"), + help="The binary to run in syscall emulation mode.") parser.add_option("-o", "--options", default="", - help="The options to pass to the binary, use \" \" around the entire\ - string.") -parser.add_option("-i", "--input", default="", - help="A file of input to give to the binary.") -parser.add_option("-d", "--detailed", action="store_true") -parser.add_option("-t", "--timing", action="store_true") -parser.add_option("-m", "--maxtick", type="int") + help='The options to pass to the binary, use " " around the entire string') +parser.add_option("-i", "--input", default="", help="Read stdin from a file.") +parser.add_option("--output", default="", help="Redirect stdout to a file.") +parser.add_option("--errout", default="", help="Redirect stderr to a file.") + +execfile(os.path.join(config_root, "common", "Options.py")) (options, args) = parser.parse_args() @@ -56,11 +68,32 @@ if args: print "Error: script doesn't take any positional arguments" sys.exit(1) -process = LiveProcess() -process.executable = options.cmd -process.cmd = options.cmd + " " + options.options +if options.bench: + try: + if m5.build_env['TARGET_ISA'] != 'alpha': + print >>sys.stderr, "Simpoints code only works for Alpha ISA at this time" + sys.exit(1) + exec("workload = %s('alpha', 'tru64', 'ref')" % options.bench) + process = workload.makeLiveProcess() + except: + print >>sys.stderr, "Unable to find workload for %s" % options.bench + sys.exit(1) +else: + process = LiveProcess() + process.executable = options.cmd + process.cmd = [options.cmd] + options.options.split() + + if options.input != "": process.input = options.input +if options.output != "": + process.output = options.output +if options.errout != "": + process.errout = options.errout + + +# By default, set workload to path of user-specified binary +workloads = options.cmd if options.detailed: #check for SMT workload @@ -69,9 +102,15 @@ if options.detailed: process = [] smt_idx = 0 inputs = [] + outputs = [] + errouts = [] if options.input != "": inputs = options.input.split(';') + if options.output != "": + outputs = options.output.split(';') + if options.errout != "": + errouts = options.errout.split(';') for wrkld in workloads: smt_process = LiveProcess() @@ -79,40 +118,45 @@ if options.detailed: smt_process.cmd = wrkld + " " + options.options if inputs and inputs[smt_idx]: smt_process.input = inputs[smt_idx] + if outputs and outputs[smt_idx]: + smt_process.output = outputs[smt_idx] + if errouts and errouts[smt_idx]: + smt_process.errout = errouts[smt_idx] process += [smt_process, ] smt_idx += 1 +(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) -if options.timing: - cpu = TimingSimpleCPU() -elif options.detailed: - cpu = DetailedO3CPU() -else: - cpu = AtomicSimpleCPU() - -cpu.workload = process -cpu.cpu_id = 0 - -system = System(cpu = cpu, - physmem = PhysicalMemory(), - membus = Bus()) -system.physmem.port = system.membus.port -system.cpu.connectMemPorts(system.membus) -system.cpu.mem = system.physmem +CPUClass.clock = '2GHz' +CPUClass.numThreads = len(workloads) -root = Root(system = system) +np = options.num_cpus -if options.timing or options.detailed: - root.system.mem_mode = 'timing' +system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)], + physmem = PhysicalMemory(range=AddrRange("512MB")), + membus = Bus(), mem_mode = test_mem_mode) -# instantiate configuration -m5.instantiate(root) +system.physmem.port = system.membus.port -# simulate until program terminates -if options.maxtick: - exit_event = m5.simulate(options.maxtick) -else: - exit_event = m5.simulate() +if options.l2cache: + system.l2 = L2Cache(size='2MB') + system.tol2bus = Bus() + system.l2.cpu_side = system.tol2bus.port + system.l2.mem_side = system.membus.port + +for i in xrange(np): + if options.caches: + system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), + L1Cache(size = '64kB')) + if options.l2cache: + system.cpu[i].connectMemPorts(system.tol2bus) + else: + system.cpu[i].connectMemPorts(system.membus) + system.cpu[i].workload = process + + if options.fastmem: + system.cpu[0].physmem_port = system.physmem.port -print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() +root = Root(system = system) +Simulation.run(options, root, system, FutureClass)