X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=cpu%2Fbase_cpu.hh;h=f38a6c9391e59289aede44877db914c157742438;hb=87d27637aa2e99d5218e2e5dd5b728a3d650a2e7;hp=5946ced2f1accc6f6c0486e77c94d060b62c1a53;hpb=4134477369028e04dd265a43753868c01912c465;p=gem5.git diff --git a/cpu/base_cpu.hh b/cpu/base_cpu.hh index 5946ced2f..f38a6c939 100644 --- a/cpu/base_cpu.hh +++ b/cpu/base_cpu.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003 The Regents of The University of Michigan + * Copyright (c) 2002-2004 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -31,10 +31,11 @@ #include +#include "base/statistics.hh" +#include "cpu/sampling_cpu/sampling_cpu.hh" #include "sim/eventq.hh" #include "sim/sim_object.hh" - -#include "targetarch/isa_traits.hh" // for Addr +#include "targetarch/isa_traits.hh" #ifdef FULL_SYSTEM class System; @@ -45,17 +46,25 @@ class ExecContext; class BaseCPU : public SimObject { + protected: + // CPU's clock period in terms of the number of ticks of curTime. + Tick clock; + + public: + inline Tick frequency() const { return Clock::Frequency / clock; } + inline Tick cycles(int numCycles) const { return clock * numCycles; } + inline Tick curCycle() const { return curTick / clock; } + #ifdef FULL_SYSTEM protected: - int number; - Tick frequency; - uint8_t interrupts[NumInterruptLevels]; + uint64_t interrupts[NumInterruptLevels]; uint64_t intstatus; public: virtual void post_interrupt(int int_num, int index); virtual void clear_interrupt(int int_num, int index); virtual void clear_interrupts(); + bool checkInterrupts; bool check_interrupt(int int_num) const { if (int_num > NumInterruptLevels) @@ -66,36 +75,63 @@ class BaseCPU : public SimObject bool check_interrupts() const { return intstatus != 0; } uint64_t intr_status() const { return intstatus; } - - Tick getFreq() const { return frequency; } #endif protected: - std::vector contexts; + std::vector execContexts; public: - virtual void execCtxStatusChg() {} - public: + /// Notify the CPU that the indicated context is now active. The + /// delay parameter indicates the number of ticks to wait before + /// executing (typically 0 or 1). + virtual void activateContext(int thread_num, int delay) {} + + /// Notify the CPU that the indicated context is now suspended. + virtual void suspendContext(int thread_num) {} + + /// Notify the CPU that the indicated context is now deallocated. + virtual void deallocateContext(int thread_num) {} + /// Notify the CPU that the indicated context is now halted. + virtual void haltContext(int thread_num) {} + + public: + struct Params + { + std::string name; + int numberOfThreads; + bool deferRegistration; + Counter max_insts_any_thread; + Counter max_insts_all_threads; + Counter max_loads_any_thread; + Counter max_loads_all_threads; + Tick clock; + bool functionTrace; + Tick functionTraceStart; #ifdef FULL_SYSTEM - BaseCPU(const std::string &_name, int _number_of_threads, - Counter max_insts_any_thread, Counter max_insts_all_threads, - Counter max_loads_any_thread, Counter max_loads_all_threads, - System *_system, - int num, Tick freq); -#else - BaseCPU(const std::string &_name, int _number_of_threads, - Counter max_insts_any_thread = 0, - Counter max_insts_all_threads = 0, - Counter max_loads_any_thread = 0, - Counter max_loads_all_threads = 0); + System *system; #endif + }; - virtual ~BaseCPU() {} + const Params *params; + BaseCPU(Params *params); + virtual ~BaseCPU(); + + virtual void init(); virtual void regStats(); + void registerExecContexts(); + + /// Prepare for another CPU to take over execution. When it is + /// is ready (drained pipe) it signals the sampler. + virtual void switchOut(SamplingCPU *); + + /// Take over execution from the given CPU. Used for warm-up and + /// sampling. + virtual void takeOverFrom(BaseCPU *); + /** * Number of threads we're actually simulating (<= SMT_MAX_THREADS). * This is a constant for the duration of the simulation. @@ -107,7 +143,7 @@ class BaseCPU : public SimObject * scheduling events based on number of instructions committed by * a particular thread. */ - EventQueue **comInsnEventQueue; + EventQueue **comInstEventQueue; /** * Vector of per-thread load-based event queues. Used for @@ -118,10 +154,21 @@ class BaseCPU : public SimObject #ifdef FULL_SYSTEM System *system; -#endif - virtual bool filterThisInstructionPrefetch(int thread_number, - short asid, Addr prefetchTarget) const { return true; } + /** + * Serialize this object to the given output stream. + * @param os The stream to serialize to. + */ + virtual void serialize(std::ostream &os); + + /** + * Reconstruct the state of this object from a checkpoint. + * @param cp The checkpoint use. + * @param section The section name of this object + */ + virtual void unserialize(Checkpoint *cp, const std::string §ion); + +#endif /** * Return pointer to CPU's branch predictor (NULL if none). @@ -129,11 +176,44 @@ class BaseCPU : public SimObject */ virtual BranchPred *getBranchPred() { return NULL; }; + virtual Counter totalInstructions() const { return 0; } + + // Function tracing + private: + bool functionTracingEnabled; + std::ostream *functionTraceStream; + Addr currentFunctionStart; + Addr currentFunctionEnd; + Tick functionEntryTick; + void enableFunctionTrace(); + void traceFunctionsInternal(Addr pc); + + protected: + void traceFunctions(Addr pc) + { + if (functionTracingEnabled) + traceFunctionsInternal(pc); + } + private: static std::vector cpuList; //!< Static global cpu list public: static int numSimulatedCPUs() { return cpuList.size(); } + static Counter numSimulatedInstructions() + { + Counter total = 0; + + int size = cpuList.size(); + for (int i = 0; i < size; ++i) + total += cpuList[i]->totalInstructions(); + + return total; + } + + public: + // Number of CPU cycles simulated + Stats::Scalar<> numCycles; }; #endif // __BASE_CPU_HH__