X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=debug%2Fgdbserver.py;h=d0ad46e553b1afc0c9de7c77e3f153c96138cdfa;hb=a0259333dcd4bbba2dbfaeb7bfb9145c56cf96ca;hp=5ac0153c469cf566fa3a811491475ca5dd4e9796;hpb=14dfde33927bead9d08409e2d2b70c8bf5023095;p=riscv-tests.git diff --git a/debug/gdbserver.py b/debug/gdbserver.py index 5ac0153..d0ad46e 100755 --- a/debug/gdbserver.py +++ b/debug/gdbserver.py @@ -12,7 +12,7 @@ import targets import testlib from testlib import assertEqual, assertNotEqual, assertIn, assertNotIn from testlib import assertGreater, assertRegexpMatches, assertLess -from testlib import GdbTest +from testlib import GdbTest, GdbSingleHartTest, TestFailed MSTATUS_UIE = 0x00000001 MSTATUS_SIE = 0x00000002 @@ -66,8 +66,8 @@ def readable_binary_string(s): class SimpleRegisterTest(GdbTest): def check_reg(self, name): - a = random.randrange(1< 1000 and \ + local > 1000: + return + + assertGreater(interrupt_count, 1000) + assertGreater(local, 1000) + + def postMortem(self): + GdbSingleHartTest.postMortem(self) + self.gdb.p("*((long long*) 0x200bff8)") + self.gdb.p("*((long long*) 0x2004000)") + self.gdb.p("interrupt_count") + self.gdb.p("local") + +class MulticoreRegTest(GdbTest): + compile_args = ("programs/infinite_loop.S", "-DMULTICORE") + + def early_applicable(self): + return len(self.target.harts) > 1 + + def setup(self): + self.gdb.load() + for hart in self.target.harts: + self.gdb.select_hart(hart) self.gdb.p("$pc=_start") + + def test(self): # Run to main - for t in threads: - self.gdb.thread(t) - self.gdb.c() + self.gdb.b("main") + self.gdb.c() for t in self.gdb.threads(): assertIn("main", t.frame) - # Run to end - for t in threads: - self.gdb.thread(t) - self.gdb.c() + self.gdb.command("delete breakpoints") + + # Run through the entire loop. + self.gdb.b("main_end") + self.gdb.c() + hart_ids = [] for t in self.gdb.threads(): assertIn("main_end", t.frame) @@ -447,24 +501,54 @@ class MulticoreTest(GdbTest): # Confirmed that we read different register values for different harts. # Write a new value to x1, and run through the add sequence again. - # This part isn't working right, because gdb doesn't resume Thread 2 - # when asked. I don't know the root cause for that, but up to this - # point the test is still useful. - -# for t in threads: -# self.gdb.thread(t) -# self.gdb.p("$x1=0x%x" % (int(t.id) + 0x800)) -# self.gdb.p("$pc=main_post_csrr") -# for t in threads: -# self.gdb.thread(t) -# self.gdb.c() -# for t in self.gdb.threads(): -# assertIn("main_end", t.frame) -# # Check register values. -# self.gdb.thread(t) -# for n in range(1, 32): -# value = self.gdb.p("$x%d" % n) -# assertEqual(value, int(t.id) + 0x800 + n - 1) + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.p("$x1=0x%x" % (hart.index * 0x800)) + self.gdb.p("$pc=main_post_csrr") + self.gdb.c() + for t in self.gdb.threads(): + assertIn("main_end", t.frame) + for hart in self.target.harts: + # Check register values. + self.gdb.select_hart(hart) + for n in range(1, 32): + value = self.gdb.p("$x%d" % n) + assertEqual(value, hart.index * 0x800 + n - 1) + +class MulticoreRunHaltStepiTest(GdbTest): + compile_args = ("programs/multicore.c", "-DMULTICORE") + + def early_applicable(self): + return len(self.target.harts) > 1 + + def setup(self): + self.gdb.load() + for hart in self.target.harts: + self.gdb.select_hart(hart) + self.gdb.p("$pc=_start") + + def test(self): + previous_hart_count = [0 for h in self.target.harts] + previous_interrupt_count = [0 for h in self.target.harts] + for _ in range(10): + self.gdb.c(wait=False) + time.sleep(2) + self.gdb.interrupt() + self.gdb.p("$mie") + self.gdb.p("$mip") + self.gdb.p("$mstatus") + self.gdb.p("$priv") + self.gdb.p("buf", fmt="") + hart_count = self.gdb.p("hart_count") + interrupt_count = self.gdb.p("interrupt_count") + for i, h in enumerate(self.target.harts): + assertGreater(hart_count[i], previous_hart_count[i]) + assertGreater(interrupt_count[i], previous_interrupt_count[i]) + self.gdb.select_hart(h) + pc = self.gdb.p("$pc") + self.gdb.stepi() + stepped_pc = self.gdb.p("$pc") + assertNotEqual(pc, stepped_pc) class StepTest(GdbTest): compile_args = ("programs/step.S", ) @@ -476,7 +560,7 @@ class StepTest(GdbTest): def test(self): main_address = self.gdb.p("$pc") - if self.target.extensionSupported("c"): + if self.hart.extensionSupported("c"): sequence = (4, 8, 0xc, 0xe, 0x14, 0x18, 0x22, 0x1c, 0x24, 0x24) else: sequence = (4, 8, 0xc, 0x10, 0x18, 0x1c, 0x28, 0x20, 0x2c, 0x2c) @@ -554,14 +638,17 @@ class TriggerStoreAddressInstant(TriggerTest): assertEqual(self.gdb.p("$a0"), self.gdb.p("&data")) class TriggerDmode(TriggerTest): + def early_applicable(self): + return self.hart.honors_tdata1_hmode + def check_triggers(self, tdata1_lsbs, tdata2): - dmode = 1 << (self.target.xlen-5) + dmode = 1 << (self.hart.xlen-5) triggers = [] - if self.target.xlen == 32: + if self.hart.xlen == 32: xlen_type = 'int' - elif self.target.xlen == 64: + elif self.hart.xlen == 64: xlen_type = 'long long' else: raise NotImplementedError @@ -621,7 +708,7 @@ class WriteGprs(RegsTest): self.gdb.command("info registers") for n in range(len(regs)): assertEqual(self.gdb.x("data+%d" % (8*n), 'g'), - ((0xdeadbeef<\n") @@ -671,7 +758,7 @@ class DownloadTest(GdbTest): if self.crc < 0: self.crc += 2**32 - self.binary = self.target.compile(self.download_c.name, + self.binary = self.target.compile(self.hart, self.download_c.name, "programs/checksum.c") self.gdb.command("file %s" % self.binary) @@ -702,7 +789,7 @@ class DownloadTest(GdbTest): # # pylint: disable=attribute-defined-outside-init # self.gdb.load() # -# misa = self.target.misa +# misa = self.hart.misa # self.supported = set() # if misa & (1<<20): # self.supported.add(0)