X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=dev%2Fide_ctrl.cc;h=aa0217745281ba41e7c29d13ad30f222060f9ac1;hb=425dda00df994b2483850e80260618b2a1a957bf;hp=e40248461bd8d8fdf8bd23a6c742733e55ab4763;hpb=13f8dc981fc898e6e200689d305b39f0718f8c83;p=gem5.git

diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc
index e40248461..aa0217745 100644
--- a/dev/ide_ctrl.cc
+++ b/dev/ide_ctrl.cc
@@ -34,16 +34,16 @@
 #include "base/trace.hh"
 #include "cpu/intr_control.hh"
 #include "dev/dma.hh"
-#include "dev/pcireg.h"
-#include "dev/pciconfigall.hh"
-#include "dev/ide_disk.hh"
 #include "dev/ide_ctrl.hh"
+#include "dev/ide_disk.hh"
+#include "dev/pciconfigall.hh"
+#include "dev/pcireg.h"
+#include "dev/platform.hh"
 #include "dev/tsunami_cchip.hh"
 #include "mem/bus/bus.hh"
+#include "mem/bus/dma_interface.hh"
 #include "mem/bus/pio_interface.hh"
 #include "mem/bus/pio_interface_impl.hh"
-#include "mem/bus/dma_interface.hh"
-#include "dev/tsunami.hh"
 #include "mem/functional_mem/memory_control.hh"
 #include "mem/functional_mem/physical_memory.hh"
 #include "sim/builder.hh"
@@ -63,9 +63,6 @@ IdeController::IdeController(const string &name, IntrControl *ic,
                              Bus *host_bus, Tick pio_latency, HierParams *hier)
     : PciDev(name, mmu, cf, cd, bus_num, dev_num, func_num), tsunami(t)
 {
-    // put back pointer into Tsunami
-    tsunami->disk_controller = this;
-
     // initialize the PIO interface addresses
     pri_cmd_addr = 0;
     pri_cmd_size = BARSize[0];
@@ -245,13 +242,13 @@ IdeController::setDmaComplete(IdeDisk *disk)
 void
 IdeController::intrPost()
 {
-    tsunami->cchip->postDRIR(configData->config.hdr.pci0.interruptLine);
+    tsunami->postPciInt(configData->config.hdr.pci0.interruptLine);
 }
 
 void
 IdeController::intrClear()
 {
-    tsunami->cchip->clearDRIR(configData->config.hdr.pci0.interruptLine);
+    tsunami->clearPciInt(configData->config.hdr.pci0.interruptLine);
 }
 
 ////
@@ -377,10 +374,10 @@ IdeController::WriteConfig(int offset, int size, uint32_t data)
         if (BARAddrs[0] != 0) {
             pri_cmd_addr = BARAddrs[0];
             if (pioInterface)
-                pioInterface->addAddrRange(pri_cmd_addr,
-                                           pri_cmd_addr + pri_cmd_size - 1);
+                pioInterface->addAddrRange(RangeSize(pri_cmd_addr,
+                                                     pri_cmd_size));
 
-            pri_cmd_addr &= PA_UNCACHED_MASK;
+            pri_cmd_addr &= EV5::PAddrUncachedMask;
         }
         break;
 
@@ -388,10 +385,10 @@ IdeController::WriteConfig(int offset, int size, uint32_t data)
         if (BARAddrs[1] != 0) {
             pri_ctrl_addr = BARAddrs[1];
             if (pioInterface)
-                pioInterface->addAddrRange(pri_ctrl_addr,
-                                           pri_ctrl_addr + pri_ctrl_size - 1);
+                pioInterface->addAddrRange(RangeSize(pri_ctrl_addr,
+                                                     pri_ctrl_size));
 
-            pri_ctrl_addr &= PA_UNCACHED_MASK;
+            pri_ctrl_addr &= EV5::PAddrUncachedMask;
         }
         break;
 
@@ -399,10 +396,10 @@ IdeController::WriteConfig(int offset, int size, uint32_t data)
         if (BARAddrs[2] != 0) {
             sec_cmd_addr = BARAddrs[2];
             if (pioInterface)
-                pioInterface->addAddrRange(sec_cmd_addr,
-                                           sec_cmd_addr + sec_cmd_size - 1);
+                pioInterface->addAddrRange(RangeSize(sec_cmd_addr,
+                                                     sec_cmd_size));
 
-            sec_cmd_addr &= PA_UNCACHED_MASK;
+            sec_cmd_addr &= EV5::PAddrUncachedMask;
         }
         break;
 
@@ -410,10 +407,10 @@ IdeController::WriteConfig(int offset, int size, uint32_t data)
         if (BARAddrs[3] != 0) {
             sec_ctrl_addr = BARAddrs[3];
             if (pioInterface)
-                pioInterface->addAddrRange(sec_ctrl_addr,
-                                           sec_ctrl_addr + sec_ctrl_size - 1);
+                pioInterface->addAddrRange(RangeSize(sec_ctrl_addr,
+                                                     sec_ctrl_size));
 
-            sec_ctrl_addr &= PA_UNCACHED_MASK;
+            sec_ctrl_addr &= EV5::PAddrUncachedMask;
         }
         break;
 
@@ -421,9 +418,9 @@ IdeController::WriteConfig(int offset, int size, uint32_t data)
         if (BARAddrs[4] != 0) {
             bmi_addr = BARAddrs[4];
             if (pioInterface)
-                pioInterface->addAddrRange(bmi_addr, bmi_addr + bmi_size - 1);
+                pioInterface->addAddrRange(RangeSize(bmi_addr, bmi_size));
 
-            bmi_addr &= PA_UNCACHED_MASK;
+            bmi_addr &= EV5::PAddrUncachedMask;
         }
         break;
     }
@@ -675,15 +672,11 @@ IdeController::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_ARRAY(cmd_in_progress, 4);
 
     if (pioInterface) {
-        pioInterface->addAddrRange(pri_cmd_addr, pri_cmd_addr +
-                                   pri_cmd_size - 1);
-        pioInterface->addAddrRange(pri_ctrl_addr, pri_ctrl_addr +
-                                   pri_ctrl_size - 1);
-        pioInterface->addAddrRange(sec_cmd_addr, sec_cmd_addr +
-                                   sec_cmd_size - 1);
-        pioInterface->addAddrRange(sec_ctrl_addr, sec_ctrl_addr +
-                                   sec_ctrl_size - 1);
-        pioInterface->addAddrRange(bmi_addr, bmi_addr + bmi_size - 1);
+        pioInterface->addAddrRange(RangeSize(pri_cmd_addr, pri_cmd_size));
+        pioInterface->addAddrRange(RangeSize(pri_ctrl_addr, pri_ctrl_size));
+        pioInterface->addAddrRange(RangeSize(sec_cmd_addr, sec_cmd_size));
+        pioInterface->addAddrRange(RangeSize(sec_ctrl_addr, sec_ctrl_size));
+        pioInterface->addAddrRange(RangeSize(bmi_addr, bmi_size));
    }
 }