X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=dev%2Fns_gige.hh;h=181837c8df5d241971eab37b012734b906ee300d;hb=466284b5d29ad0d44c1b020353cf7521be2b90de;hp=7db8330284db94415190431000dd43face74f980;hpb=f806a25c9edb3a9a9f5bc34b88340be6b24a2022;p=gem5.git

diff --git a/dev/ns_gige.hh b/dev/ns_gige.hh
index 7db833028..181837c8d 100644
--- a/dev/ns_gige.hh
+++ b/dev/ns_gige.hh
@@ -170,9 +170,6 @@ class NSGigE : public PciDev
     static const Addr size = sizeof(dp_regs);
 
   protected:
-    typedef std::deque<PacketPtr> pktbuf_t;
-    typedef pktbuf_t::iterator pktiter_t;
-
     /** device register file */
     dp_regs regs;
     dp_rom rom;
@@ -396,7 +393,8 @@ class NSGigE : public PciDev
         Net::EthAddr eaddr;
         uint32_t tx_fifo_size;
         uint32_t rx_fifo_size;
-        bool dedicated;
+        bool rx_thread;
+        bool tx_thread;
         bool dma_no_allocate;
     };
 
@@ -407,8 +405,8 @@ class NSGigE : public PciDev
     virtual void writeConfig(int offset, int size, const uint8_t *data);
     virtual void readConfig(int offset, int size, uint8_t *data);
 
-    virtual Fault read(MemReqPtr &req, uint8_t *data);
-    virtual Fault write(MemReqPtr &req, const uint8_t *data);
+    virtual Fault * read(MemReqPtr &req, uint8_t *data);
+    virtual Fault * write(MemReqPtr &req, const uint8_t *data);
 
     bool cpuIntrPending() const;
     void cpuIntrAck() { cpuIntrClear(); }