X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=dev%2Fns_gige.hh;h=a8d8d1f18dac194b06cd0f2220b019038b770471;hb=7c2084dcfe7b7b2133a6c0055e52fab745550f81;hp=de8d93c700f8872c2c386e8650b7180e0e1dc3dd;hpb=d270ea851a92e98d3efe30774f31f935d846dcd3;p=gem5.git

diff --git a/dev/ns_gige.hh b/dev/ns_gige.hh
index de8d93c70..a8d8d1f18 100644
--- a/dev/ns_gige.hh
+++ b/dev/ns_gige.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -158,21 +158,27 @@ class NSGigE : public PciDev
     dp_regs regs;
     dp_rom rom;
 
-     /*** BASIC STRUCTURES FOR TX/RX ***/
+    /** pci settings */
+    bool ioEnable;
+#if 0
+    bool memEnable;
+    bool bmEnable;
+#endif
+
+    /*** BASIC STRUCTURES FOR TX/RX ***/
     /* Data FIFOs */
     pktbuf_t txFifo;
     pktbuf_t rxFifo;
 
     /** various helper vars */
+    PacketPtr txPacket;
+    PacketPtr rxPacket;
     uint8_t *txPacketBufPtr;
     uint8_t *rxPacketBufPtr;
     uint32_t txXferLen;
     uint32_t rxXferLen;
-    uint32_t txPktXmitted;
     bool rxDmaFree;
     bool txDmaFree;
-    PacketPtr txPacket;
-    PacketPtr rxPacket;
 
     /** DescCaches */
     ns_desc txDescCache;
@@ -182,8 +188,6 @@ class NSGigE : public PciDev
     TxState txState;
     /** Current Transmit Descriptor Done */
     bool CTDD;
-    /** amt of data in the txDataFifo in bytes (logical) */
-    uint32_t txFifoCnt;
     /** current amt of free space in txDataFifo in bytes */
     uint32_t txFifoAvail;
     /** halt the tx state machine after next packet */
@@ -261,18 +265,7 @@ class NSGigE : public PciDev
 
     void txReset();
     void rxReset();
-    void regsReset() {
-        memset(&regs, 0, sizeof(regs));
-        regs.config = 0x80000000;
-        regs.mear = 0x12;
-        regs.isr = 0x00608000;
-        regs.txcfg = 0x120;
-        regs.rxcfg = 0x4;
-        regs.srr = 0x0103;
-        regs.mibc = 0x2;
-        regs.vdr = 0x81;
-        regs.tesr = 0xc000;
-    }
+    void regsReset();
 
     void rxKick();
     Tick rxKickTick;
@@ -373,6 +366,14 @@ class NSGigE : public PciDev
     Stats::Scalar<> rxBytes;
     Stats::Scalar<> txPackets;
     Stats::Scalar<> rxPackets;
+    Stats::Scalar<> txIPChecksums;
+    Stats::Scalar<> rxIPChecksums;
+    Stats::Scalar<> txTCPChecksums;
+    Stats::Scalar<> rxTCPChecksums;
+    Stats::Scalar<> descDmaReads;
+    Stats::Scalar<> descDmaWrites;
+    Stats::Scalar<> descDmaRdBytes;
+    Stats::Scalar<> descDmaWrBytes;
     Stats::Formula txBandwidth;
     Stats::Formula rxBandwidth;
     Stats::Formula txPacketRate;