X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=dev%2Fpcidev.cc;h=9d568e6cce2f83634f9dd1f4ad2bc3566bccbe7e;hb=715176d450fe2c85d3a72d80cd5c2460f8c552cd;hp=f0ceb40f20fa994c7250ec26a0f4c15ca93a4fb4;hpb=be0184b463056645d97598dfc98292f75e579b1a;p=gem5.git

diff --git a/dev/pcidev.cc b/dev/pcidev.cc
index f0ceb40f2..9d568e6cc 100644
--- a/dev/pcidev.cc
+++ b/dev/pcidev.cc
@@ -39,47 +39,50 @@
 #include "base/misc.hh"
 #include "base/str.hh"	// for to_number
 #include "base/trace.hh"
-#include "dev/pciareg.h"
 #include "dev/pcidev.hh"
 #include "dev/pciconfigall.hh"
-#include "mem/functional_mem/memory_control.hh"
+#include "mem/bus/bus.hh"
+#include "mem/functional/memory_control.hh"
 #include "sim/builder.hh"
 #include "sim/param.hh"
-#include "sim/universe.hh"
+#include "sim/root.hh"
 #include "dev/tsunamireg.h"
 
 using namespace std;
 
-PciDev::PciDev(const string &name, MemoryController *mmu, PciConfigAll *cf,
-               PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func)
-    : DmaDevice(name), mmu(mmu), configSpace(cf), configData(cd), busNum(bus),
-      deviceNum(dev), functionNum(func)
+PciDev::PciDev(Params *p)
+    : DmaDevice(p->name, p->plat), _params(p), plat(p->plat),
+      configData(p->configData)
 {
     // copy the config data from the PciConfigData object
-    if (cd) {
-        memcpy(config.data, cd->config.data, sizeof(config.data));
-        memcpy(BARSize, cd->BARSize, sizeof(BARSize));
-        memcpy(BARAddrs, cd->BARAddrs, sizeof(BARAddrs));
+    if (configData) {
+        memcpy(config.data, configData->config.data, sizeof(config.data));
+        memcpy(BARSize, configData->BARSize, sizeof(BARSize));
+        memcpy(BARAddrs, configData->BARAddrs, sizeof(BARAddrs));
     } else
         panic("NULL pointer to configuration data");
 
     // Setup pointer in config space to point to this entry
-    if (cf->deviceExists(dev,func))
-        panic("Two PCI devices occuping same dev: %#x func: %#x", dev, func);
+    if (p->configSpace->deviceExists(p->deviceNum, p->functionNum))
+        panic("Two PCI devices occuping same dev: %#x func: %#x",
+              p->deviceNum, p->functionNum);
     else
-        cf->registerDevice(dev, func, this);
+        p->configSpace->registerDevice(p->deviceNum, p->functionNum, this);
 }
 
 void
 PciDev::ReadConfig(int offset, int size, uint8_t *data)
 {
+    if (offset >= PCI_DEVICE_SPECIFIC)
+        panic("Device specific PCI config space not implemented!\n");
+
     switch(size) {
       case sizeof(uint32_t):
         memcpy((uint8_t*)data, config.data + offset, sizeof(uint32_t));
         *(uint32_t*)data = htoa(*(uint32_t*)data);
         DPRINTF(PCIDEV,
                 "read device: %#x function: %#x register: %#x %d bytes: data: %#x\n",
-                deviceNum, functionNum, offset, size,
+                params()->deviceNum, params()->functionNum, offset, size,
                 *(uint32_t*)(config.data + offset));
         break;
 
@@ -88,7 +91,7 @@ PciDev::ReadConfig(int offset, int size, uint8_t *data)
         *(uint16_t*)data = htoa(*(uint16_t*)data);
         DPRINTF(PCIDEV,
                 "read device: %#x function: %#x register: %#x %d bytes: data: %#x\n",
-                deviceNum, functionNum, offset, size,
+                params()->deviceNum, params()->functionNum, offset, size,
                 *(uint16_t*)(config.data + offset));
         break;
 
@@ -96,7 +99,7 @@ PciDev::ReadConfig(int offset, int size, uint8_t *data)
         memcpy((uint8_t*)data, config.data + offset, sizeof(uint8_t));
         DPRINTF(PCIDEV,
                 "read device: %#x function: %#x register: %#x %d bytes: data: %#x\n",
-                deviceNum, functionNum, offset, size,
+                params()->deviceNum, params()->functionNum, offset, size,
                 (uint16_t)(*(uint8_t*)(config.data + offset)));
         break;
 
@@ -108,6 +111,9 @@ PciDev::ReadConfig(int offset, int size, uint8_t *data)
 void
 PciDev::WriteConfig(int offset, int size, uint32_t data)
 {
+    if (offset >= PCI_DEVICE_SPECIFIC)
+        panic("Device specific PCI config space not implemented!\n");
+
     uint32_t barnum;
 
     union {
@@ -119,7 +125,8 @@ PciDev::WriteConfig(int offset, int size, uint32_t data)
 
     DPRINTF(PCIDEV,
             "write device: %#x function: %#x reg: %#x size: %d data: %#x\n",
-            deviceNum, functionNum, offset, size, word_value);
+            params()->deviceNum, params()->functionNum, offset, size,
+            word_value);
 
     barnum = (offset - PCI0_BASE_ADDR0) >> 2;
 
@@ -177,9 +184,12 @@ PciDev::WriteConfig(int offset, int size, uint32_t data)
                         (htoa(config.data[offset]) & 0xF));
                 }
             } else {
+                MemoryController *mmu = params()->mmu;
+
                 // This is I/O Space, bottom two bits are read only
                 if(htoa(config.data[offset]) & 0x1) {
-                    *(uint32_t *)&config.data[offset] = htoa((word_value & ~0x3) |
+                    *(uint32_t *)&config.data[offset] =
+                        htoa((word_value & ~0x3) |
                         (htoa(config.data[offset]) & 0x3));
 
                     if (word_value & ~0x1) {
@@ -201,7 +211,8 @@ PciDev::WriteConfig(int offset, int size, uint32_t data)
 
                 } else {
                     // This is memory space, bottom four bits are read only
-                    *(uint32_t *)&config.data[offset] = htoa((word_value & ~0xF) |
+                    *(uint32_t *)&config.data[offset] =
+                        htoa((word_value & ~0xF) |
                         (htoa(config.data[offset]) & 0xF));
 
                     if (word_value & ~0x3) {
@@ -265,7 +276,7 @@ PciDev::unserialize(Checkpoint *cp, const std::string &section)
     // Add the MMU mappings for the BARs
     for (int i=0; i < 6; i++) {
         if (BARAddrs[i] != 0)
-            mmu->add_child(this, RangeSize(BARAddrs[i], BARSize[i]));
+            params()->mmu->add_child(this, RangeSize(BARAddrs[i], BARSize[i]));
     }
 }