X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=dev%2Ftsunami.hh;h=7fd91d5b269ab5b7f289329e971338401fe61103;hb=fc664f7ca6d4883e9efe7fb823cd903a867af7a9;hp=05563f80b14091388c5b3a0106b49e16bad68c10;hpb=b031888038a905e1572bbd3ed42ee4e4a7f599a6;p=gem5.git

diff --git a/dev/tsunami.hh b/dev/tsunami.hh
index 05563f80b..7fd91d5b2 100644
--- a/dev/tsunami.hh
+++ b/dev/tsunami.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004 The Regents of The University of Michigan
+ * Copyright (c) 2004-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -32,8 +32,8 @@
  * retains pointers to all its children so the children can communicate.
  */
 
-#ifndef __TSUNAMI_HH__
-#define __TSUNAMI_HH__
+#ifndef __DEV_TSUNAMI_HH__
+#define __DEV_TSUNAMI_HH__
 
 #include "dev/platform.hh"
 
@@ -56,9 +56,8 @@ class System;
 class Tsunami : public Platform
 {
   public:
-
     /** Max number of CPUs in a Tsunami */
-    static const int Max_CPUs = 4;
+    static const int Max_CPUs = 64;
 
     /** Pointer to the system */
     System *system;
@@ -67,15 +66,15 @@ class Tsunami : public Platform
     TsunamiIO *io;
 
     /** Pointer to the Tsunami CChip.
-      * The chip contains some configuration information and
-      * all the interrupt mask and status registers
-      */
+     * The chip contains some configuration information and
+     * all the interrupt mask and status registers
+     */
     TsunamiCChip *cchip;
 
     /** Pointer to the Tsunami PChip.
-      * The pchip is the interface to the PCI bus, in our case
-      * it does not have to do much.
-      */
+     * The pchip is the interface to the PCI bus, in our case
+     * it does not have to do much.
+     */
     TsunamiPChip *pchip;
 
     int intr_sum_type[Tsunami::Max_CPUs];
@@ -83,20 +82,18 @@ class Tsunami : public Platform
 
   public:
     /**
-      * Constructor for the Tsunami Class.
-      * @param name name of the object
-      * @param con pointer to the console
-      * @param intrcontrol pointer to the interrupt controller
-      * @param intrFreq frequency that interrupts happen
-      */
+     * Constructor for the Tsunami Class.
+     * @param name name of the object
+     * @param intrctrl pointer to the interrupt controller
+     */
     Tsunami(const std::string &name, System *s, IntrControl *intctrl,
-            PciConfigAll *pci, int intrFreq);
+            PciConfigAll *pci);
 
     /**
      * Return the interrupting frequency to AlphaAccess
      * @return frequency of RTC interrupts
      */
-     virtual Tick intrFrequency();
+    virtual Tick intrFrequency();
 
     /**
      * Cause the cpu to post a serial interrupt to the CPU.
@@ -120,7 +117,7 @@ class Tsunami : public Platform
 
     virtual Addr pciToDma(Addr pciAddr) const;
 
-  /**
+    /**
      * Serialize this object to the given output stream.
      * @param os The stream to serialize to.
      */
@@ -134,4 +131,4 @@ class Tsunami : public Platform
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 };
 
-#endif // __TSUNAMI_HH__
+#endif // __DEV_TSUNAMI_HH__