X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=dev%2Ftsunami.hh;h=db266d62d271a184607fa9f7fc3f7958370150b1;hb=19fd3439c738e06be8c43078f520054011a385cc;hp=bcbd9c75608adbd93c5226c42877d056cae87776;hpb=3bc8cffc75c2e03a6a8fe5f4425940a16405f672;p=gem5.git

diff --git a/dev/tsunami.hh b/dev/tsunami.hh
index bcbd9c756..db266d62d 100644
--- a/dev/tsunami.hh
+++ b/dev/tsunami.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003 The Regents of The University of Michigan
+ * Copyright (c) 2004 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -37,9 +37,9 @@
 
 #include "dev/platform.hh"
 
-class AdaptecController;
+class IdeController;
 class TlaserClock;
-class EtherDev;
+class NSGigE;
 class TsunamiCChip;
 class TsunamiPChip;
 class TsunamiIO;
@@ -64,10 +64,10 @@ class Tsunami : public Platform
     System *system;
     /** Pointer to the TsunamiIO device which has the RTC */
     TsunamiIO *io;
-    /** Pointer to the SCSI controller device */
-    AdaptecController *scsi;
+    /** Pointer to the disk controller device */
+    IdeController *disk_controller;
     /** Pointer to the ethernet controller device */
-    EtherDev *ethernet;
+    NSGigE *ethernet;
 
     /** Pointer to the Tsunami CChip.
       * The chip contains some configuration information and
@@ -81,12 +81,6 @@ class Tsunami : public Platform
       */
     TsunamiPChip *pchip;
 
-    /** Pointer to the PCI Config Space
-      * The config space in Tsunami all needs to return
-      * -1 if a device is not there.
-      */
-    PciConfigAll *pciconfig;
-
     int intr_sum_type[Tsunami::Max_CPUs];
     int ipi_pending[Tsunami::Max_CPUs];
 
@@ -98,10 +92,36 @@ class Tsunami : public Platform
       * @param intrcontrol pointer to the interrupt controller
       * @param intrFreq frequency that interrupts happen
       */
-    Tsunami(const std::string &name, System *s, SimConsole *con,
-            IntrControl *intctrl, int intrFreq);
+    Tsunami(const std::string &name, System *s, IntrControl *intctrl,
+            PciConfigAll *pci, int intrFreq);
+
+    /**
+     * Return the interrupting frequency to AlphaAccess
+     * @return frequency of RTC interrupts
+     */
+     virtual Tick intrFrequency();
+
+    /**
+     * Cause the cpu to post a serial interrupt to the CPU.
+     */
+    virtual void postConsoleInt();
 
+    /**
+     * Clear a posted CPU interrupt (id=55)
+     */
+    virtual void clearConsoleInt();
+
+    /**
+     * Serialize this object to the given output stream.
+     * @param os The stream to serialize to.
+     */
     virtual void serialize(std::ostream &os);
+
+    /**
+     * Reconstruct the state of this object from a checkpoint.
+     * @param cp The checkpoint use.
+     * @param section The section name of this object
+     */
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 };