X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=dev%2Fuart.hh;h=145b9ca9e6ac2c0a08a9186a5780a7150dd211f2;hb=1166d4f0bfe67a9dc178be3454b4f0eac38663ad;hp=ac8ed7d733e899a6e8bfbe6328277506d969127a;hpb=374e12c2de1d65bace95fb1db4bad122d7fff9ca;p=gem5.git

diff --git a/dev/uart.hh b/dev/uart.hh
index ac8ed7d73..145b9ca9e 100644
--- a/dev/uart.hh
+++ b/dev/uart.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004 The Regents of The University of Michigan
+ * Copyright (c) 2004-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -26,14 +26,13 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/* @file
- * Defines a 8250 UART
+/** @file
+ * Base class for UART
  */
 
-#ifndef __TSUNAMI_UART_HH__
-#define __TSUNAMI_UART_HH__
+#ifndef __UART_HH__
+#define __UART_HH__
 
-#include "dev/tsunamireg.h"
 #include "base/range.hh"
 #include "dev/io_device.hh"
 
@@ -47,46 +46,25 @@ const int TX_INT = 0x2;
 class Uart : public PioDevice
 {
 
-  private:
+  protected:
+    int status;
     Addr addr;
     Addr size;
     SimConsole *cons;
 
-
-  protected:
-    int readAddr; // tlaser only
-    uint8_t IER, DLAB, LCR, MCR;
-    int status;
-
-    class IntrEvent : public Event
-    {
-        protected:
-            Uart *uart;
-            int intrBit;
-        public:
-            IntrEvent(Uart *u, int bit);
-            virtual void process();
-            virtual const char *description();
-            void scheduleIntr();
-    };
-
-    IntrEvent txIntrEvent;
-    IntrEvent rxIntrEvent;
-    Platform *platform;
-
   public:
-    Uart(const string &name, SimConsole *c, MemoryController *mmu,
+    Uart(const std::string &name, SimConsole *c, MemoryController *mmu,
          Addr a, Addr s, HierParams *hier, Bus *bus, Tick pio_latency,
          Platform *p);
 
-    Fault read(MemReqPtr &req, uint8_t *data);
-    Fault write(MemReqPtr &req, const uint8_t *data);
+    virtual Fault read(MemReqPtr &req, uint8_t *data) = 0;
+    virtual Fault write(MemReqPtr &req, const uint8_t *data) = 0;
 
 
     /**
      * Inform the uart that there is data available.
      */
-    void dataAvailable();
+    virtual void dataAvailable() = 0;
 
 
     /**
@@ -95,9 +73,6 @@ class Uart : public PioDevice
      */
     bool intStatus() { return status ? true : false; }
 
-    virtual void serialize(std::ostream &os);
-    virtual void unserialize(Checkpoint *cp, const std::string &section);
-
     /**
      * Return how long this access will take.
      * @param req the memory request to calcuate
@@ -106,4 +81,4 @@ class Uart : public PioDevice
     Tick cacheAccess(MemReqPtr &req);
 };
 
-#endif // __TSUNAMI_UART_HH__
+#endif // __UART_HH__