X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=docs.mdwn;h=2f3753157187112883fa8eaa68a70906e0083647;hb=8203d869c28283f58e0d64b43cc545a648fd6874;hp=e1e40263c7c66591f5549e0dbe904ff449a008bc;hpb=cdfad910e1d316a56ed294dff3860d05949375c2;p=libreriscv.git

diff --git a/docs.mdwn b/docs.mdwn
index e1e40263c..2f3753157 100644
--- a/docs.mdwn
+++ b/docs.mdwn
@@ -5,16 +5,16 @@ A draft version of the specification is available at
 
 ## Codebase Structure
 
-The SOC is partitioned into three repositories. The subrepositories are
-intended as standalone projects useful outside of LibreSOC. For example,
+The SOC is partitioned into four repositories. The subrepositories are
+intended as general purpose standalone projects useful outside of LibreSOC. For example,
 the IEE754 FPU repository is a general purpose IEEE754 toolkit for the
 construction of FSMs and arbitrary length pipelines.
 
-| Git Repo | Documentation | Description   | Pypi    |
+| Git Repo | Online docs   | Description   | Pypi    |
 |----------|---------------|---------------|--------
-| [SOC](https://git.libre-soc.org/?p=soc.git;a=tree) | [Libre-SOC](https://docs.libre-soc.org/soc/) | Main OpenPOWER Hybrid CPU-GPU | |
-| [FPU](https://git.libre-soc.org/?p=ieee754fpu.git;a=tree) | -- | Equivalent to hardfloat-3 | [libresoc-ieee754fpu](https://pypi.org/project/libresoc-ieee754fpu) |
-| [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | -- | Equivalent to Chisel3.util | [libresoc-nmutil](https://pypi.org/project/libresoc-nmutil) |
+| [SOC](https://git.libre-soc.org/?p=soc.git;a=tree) | [Libre-SOC](https://docs.libre-soc.org/soc/) | Main OpenPOWER Hybrid CPU-GPU | TBD |
+| [FPU](https://git.libre-soc.org/?p=ieee754fpu.git;a=tree) | [ieee754fpu](https://docs.libre-soc.org/ieee754fpu/) | Equivalent to hardfloat-3 | [libresoc-ieee754fpu](https://pypi.org/project/libresoc-ieee754fpu) |
+| [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [nmutil](https://docs.libre-soc.org/nmutil/) | Equivalent to Chisel3.util | [libresoc-nmutil](https://pypi.org/project/libresoc-nmutil) |
 | [OpenPOWER ISA](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [OpenPOWER ISA](https://docs.libre-soc.org/openpower-isa/) | Simulator, ISA spec compiler, co-simulation infrastructure |  [libresoc-openpower-isa](https://pypi.org/project/libresoc-openpower-isa/)  |
 
 
@@ -22,22 +22,20 @@ Also see [[SOC Architecture|3d_gpu/architecture]]
 
 ## Installing the Codebase
 
-    pip3 install virtualenv requests
-    mkdir ~/.virtualenvs && cd ~/.virtualenvs
-    python3 -m venv libresoc
-    source ~/.virtualenvs/libresoc/bin/activate
-    
-    cd ~; mkdir libresoc; cd libresoc
-    git clone https://git.libre-soc.org/git/nmutil.git
-    git clone https://git.libre-soc.org/git/ieee754fpu.git
-    git clone https://git.libre-soc.org/git/soc.git
-    
-    cd nmutil; make install; cd ..
-    cd ieee754fpu; make install; cd ..
-    cd soc; make gitupdate; make install; cd ..
-    
-    python3 soc/src/soc/decoder/power_decoder.py
-    yosys -p "read_ilang decoder.il; show dec31" 
+Installation is much easier when using the
+[install scripts](https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=hdl-dev-repos;hb=HEAD).
+A separate script also helps install
+[dependencies](https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=install-hdl-apt-reqs;hb=HEAD)
+and a third can be used to set up a
+[debootstrap chroot](
+https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=mk-deb-chroot;hb=HEAD).
+The chroot is useful to ensure stability and repeatable builds: no
+errors or issues introduced by libraries being wrong versions.
+Also relevant is the [gdb gcc build](https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=ppc64-gdb-gcc;hb=HEAD).
+
+For a simple set of commands to follow, see [[HDL_workflow/devscripts]]. If
+you prefer to do a manual install and explicitly install dependencies
+yourself, in order to verify them, see [[HDL_workflow]]
 
 ## Gtkwave Tutorial
 
@@ -46,3 +44,20 @@ Also see [[SOC Architecture|3d_gpu/architecture]]
 ## Formal proof notes
 
 [[docs/notes_on_formal_proofs]]
+
+## Learning nmigen
+
+[[docs/learning_nmigen]]
+
+## Test API
+
+[[docs/testapi]]
+
+## Pinmux and JTAG Boundary Scan
+
+[[docs/pinmux]]
+
+## SVP64
+
+Currently in Draft form, [[openpower/sv/svp64]] is the basis of the
+Supercomputing Cray-style Vectorisation of the Power ISA.