X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=flake.nix;h=90a976cb28525ebd39463b2089e9793e24da2144;hb=fe9d3f2f05f8ac1cdb8cc0056f78ff0c94de59a9;hp=22e6470553916845f8d703518e50c53ba4b133cf;hpb=df993402533209f7fcd2d734fac1b01397bf834f;p=soc.git

diff --git a/flake.nix b/flake.nix
index 22e64705..90a976cb 100644
--- a/flake.nix
+++ b/flake.nix
@@ -1,5 +1,3 @@
-# The license for this file is included in the `nix` directory next to this file.
-
 {
   description = "FOSS CPU/GPU/VPU/SoC all in one, see https://libre-soc.org/";
 
@@ -10,10 +8,15 @@
   inputs.nmigen.flake = false;
   inputs.nmigen-soc.url = "git+https://git.libre-soc.org/git/nmigen-soc.git";
   inputs.nmigen-soc.flake = false;
+  inputs.migen.url = "github:m-labs/migen";
+  inputs.migen.flake = false;
+  inputs.yosys.url = "github:YosysHQ/yosys?rev=a58571d0fe8971cb7d3a619a31b2c21be6d75bac";
+  inputs.yosys.flake = false;
+  # submodules needed
   inputs.nix-litex.url = "git+https://git.sr.ht/~lschuermann/nix-litex?ref=main";
   inputs.nix-litex.flake = false;
 
-  outputs = { self, nixpkgs, c4m-jtag, nmigen, nmigen-soc, nix-litex }:
+  outputs = { self, nixpkgs, c4m-jtag, nmigen, nmigen-soc, nix-litex, migen, yosys }:
     let
       getv = x: builtins.substring 0 8 x.lastModifiedDate;
 
@@ -33,8 +36,8 @@
     in
     {
       overlay = final: prev: {
-        python3Packages = prev.python3Packages.override {
-          overrides = lib.composeExtensions (litex final).pythonOverlay (pfinal: pprev: {
+        python37 = prev.python37.override {
+          packageOverrides = lib.composeExtensions (litex final).pythonOverlay (pfinal: pprev: {
             libresoc-ieee754fpu = pfinal.callPackage ./nix/ieee754fpu.nix {};
             libresoc-openpower-isa = pfinal.callPackage ./nix/openpower-isa.nix {};
             c4m-jtag = pfinal.callPackage (import ./nix/c4m-jtag.nix { src = c4m-jtag; version = getv c4m-jtag; }) {};
@@ -52,25 +55,44 @@
             nmigen = pprev.nmigen.overrideAttrs (_: {
               src = nmigen;
             });
+
+            migen = pprev.migen.overrideAttrs (_: {
+              src = migen;
+            });
           });
         };
 
-        libresoc-pre-litex = final.callPackage (import ./nix/pre-litex.nix { version = getv self; }) {};
-        libresoc-ls180 = final.callPackage (import ./nix/ls180.nix { version = getv self; }) {};
-        libresoc-ecp5 = final.callPackage (import ./nix/ecp5.nix { version = getv self; }) {};
+        yosys = prev.yosys.overrideAttrs (_: {
+          version = "0.9+4052";
+          src = yosys;
+        });
+
+        libresoc-verilog = final.callPackage (import ./nix/verilog.nix { version = getv self; }) { python3Packages = final.python37Packages; };
+        libresoc-ls180 = final.callPackage (import ./nix/ls180.nix { version = getv self; }) { python3Packages = final.python37Packages; };
+        libresoc-ecp5 = final.callPackage (import ./nix/ecp5.nix { version = getv self; }) { python3Packages = final.python37Packages; };
+        libresoc-ecp5-program = final.callPackage (import ./nix/ecp5-program.nix { version = getv self; }) { python3Packages = final.python37Packages; };
         libresoc-pinmux = final.callPackage (import ./nix/pinmux.nix { version = getv self; }) {};
       };
 
+      apps = forAllSystems (system: {
+        ecp5 = {
+          type = "app";
+          program = "${nixpkgsFor.${system}.libresoc-ecp5-program}";
+        };
+      });
+      defaultApp = forAllSystems (system: self.apps.${system}.ecp5);
+
       packages = forAllSystems (system: {
-        soc = nixpkgsFor.${system}.python3Packages.libresoc-soc;
-        pre-litex = nixpkgsFor.${system}.libresoc-pre-litex;
+        soc = nixpkgsFor.${system}.python37Packages.libresoc-soc;
+        verilog = nixpkgsFor.${system}.libresoc-verilog;
         pinmux = nixpkgsFor.${system}.libresoc-pinmux;
         ls180 = nixpkgsFor.${system}.libresoc-ls180;
         ecp5 = nixpkgsFor.${system}.libresoc-ecp5;
-        openpower-isa = nixpkgsFor.${system}.python3Packages.libresoc-openpower-isa;
+        ecp5-program = nixpkgsFor.${system}.libresoc-ecp5-program;
+        openpower-isa = nixpkgsFor.${system}.python37Packages.libresoc-openpower-isa;
         debugNixpkgs = nixpkgsFor.${system};
       });
 
-      defaultPackage = forAllSystems (system: self.packages.${system}.pre-litex);
+      defaultPackage = forAllSystems (system: self.packages.${system}.verilog);
     };
 }