X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=frontends%2Fast%2Fast.h;h=6f173ca22f2f11c9bae6cbdf50f0b06040adfe74;hb=fe74b0cd95267bc78953236311382653a6db7f60;hp=59e6058a7c2abbeb51b3017b686ba3580e567db7;hpb=4f889b2f57b732083dd4bf336a0d361f70e5b2d0;p=yosys.git diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h index 59e6058a7..6f173ca22 100644 --- a/frontends/ast/ast.h +++ b/frontends/ast/ast.h @@ -75,6 +75,8 @@ namespace AST AST_TO_BITS, AST_TO_SIGNED, AST_TO_UNSIGNED, + AST_SELFSZ, + AST_CAST_SIZE, AST_CONCAT, AST_REPLICATE, AST_BIT_NOT, @@ -91,6 +93,8 @@ namespace AST AST_SHIFT_RIGHT, AST_SHIFT_SLEFT, AST_SHIFT_SRIGHT, + AST_SHIFTX, + AST_SHIFT, AST_LT, AST_LE, AST_EQ, @@ -140,7 +144,7 @@ namespace AST AST_GENCASE, AST_GENBLOCK, AST_TECALL, - + AST_POSEDGE, AST_NEGEDGE, AST_EDGE, @@ -153,7 +157,17 @@ namespace AST AST_PACKAGE, AST_WIRETYPE, - AST_TYPEDEF + AST_TYPEDEF, + AST_STRUCT, + AST_UNION, + AST_STRUCT_ITEM + }; + + struct AstSrcLocType { + unsigned int first_line, last_line; + unsigned int first_column, last_column; + AstSrcLocType() : first_line(0), last_line(0), first_column(0), last_column(0) {} + AstSrcLocType(int _first_line, int _first_column, int _last_line, int _last_column) : first_line(_first_line), last_line(_last_line), first_column(_first_column), last_column(_last_column) {} }; // convert an node type to a string (e.g. for debug output) @@ -188,6 +202,7 @@ namespace AST // if this is a multirange memory then this vector contains offset and length of each dimension std::vector multirange_dimensions; + std::vector multirange_swapped; // true if range is swapped, not used for structs // this is set by simplify and used during RTLIL generation AstNode *id2ast; @@ -195,11 +210,14 @@ namespace AST // this is used by simplify to detect if basic analysis has been performed already on the node bool basic_prep; + // this is used for ID references in RHS expressions that should use the "new" value for non-blocking assignments + bool lookahead; + // this is the original sourcecode location that resulted in this AST node // it is automatically set by the constructor using AST::current_filename and // the AST::get_line_num() callback function. std::string filename; - int linenum; + AstSrcLocType location; // creating and deleting nodes AstNode(AstNodeType type = AST_NONE, AstNode *child1 = NULL, AstNode *child2 = NULL, AstNode *child3 = NULL); @@ -232,19 +250,22 @@ namespace AST // simplify() creates a simpler AST by unrolling for-loops, expanding generate blocks, etc. // it also sets the id2ast pointers so that identifier lookups are fast in genRTLIL() bool simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, int width_hint, bool sign_hint, bool in_param); + void replace_result_wire_name_in_function(const std::string &from, const std::string &to); AstNode *readmem(bool is_readmemh, std::string mem_filename, AstNode *memory, int start_addr, int finish_addr, bool unconditional_init); - void expand_genblock(std::string index_var, std::string prefix, std::map &name_map); - void replace_ids(const std::string &prefix, const std::map &rules); + void expand_genblock(const std::string &prefix); + void label_genblks(std::set& existing, int &counter); void mem2reg_as_needed_pass1(dict> &mem2reg_places, dict &mem2reg_flags, dict &proc_flags, uint32_t &status_flags); bool mem2reg_as_needed_pass2(pool &mem2reg_set, AstNode *mod, AstNode *block, AstNode *&async_block); bool mem2reg_check(pool &mem2reg_set); void mem2reg_remove(pool &mem2reg_set, vector &delnodes); void meminfo(int &mem_width, int &mem_size, int &addr_bits); + bool detect_latch(const std::string &var); // additional functionality for evaluating constant functions struct varinfo_t { RTLIL::Const val; int offset; bool is_signed; }; bool has_const_only_constructs(bool &recommend_const_eval); + bool has_const_only_constructs(std::set& visited, bool &recommend_const_eval); void replace_variables(std::map &variables, AstNode *fcall); AstNode *eval_const_function(AstNode *fcall); bool is_simple_const_expr(); @@ -293,6 +314,7 @@ namespace AST // helpers for enum void allocateDefaultEnumValues(); + void annotateTypedEnums(AstNode *template_node); }; // process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code @@ -304,12 +326,12 @@ namespace AST struct AstModule : RTLIL::Module { AstNode *ast; bool nolatches, nomeminit, nomem2reg, mem2reg, noblackbox, lib, nowb, noopt, icells, pwires, autowire; - ~AstModule() YS_OVERRIDE; - RTLIL::IdString derive(RTLIL::Design *design, dict parameters, bool mayfail) YS_OVERRIDE; - RTLIL::IdString derive(RTLIL::Design *design, dict parameters, dict interfaces, dict modports, bool mayfail) YS_OVERRIDE; - std::string derive_common(RTLIL::Design *design, dict parameters, AstNode **new_ast_out, bool quiet = false); - void reprocess_module(RTLIL::Design *design, dict local_interfaces) YS_OVERRIDE; - RTLIL::Module *clone() const YS_OVERRIDE; + ~AstModule() override; + RTLIL::IdString derive(RTLIL::Design *design, const dict ¶meters, bool mayfail) override; + RTLIL::IdString derive(RTLIL::Design *design, const dict ¶meters, const dict &interfaces, const dict &modports, bool mayfail) override; + std::string derive_common(RTLIL::Design *design, const dict ¶meters, AstNode **new_ast_out, bool quiet = false); + void reprocess_module(RTLIL::Design *design, const dict &local_interfaces) override; + RTLIL::Module *clone() const override; void loadconfig() const; }; @@ -345,6 +367,7 @@ namespace AST_INTERNAL extern AST::AstNode *current_always, *current_top_block, *current_block, *current_block_child; extern AST::AstModule *current_module; extern bool current_always_clocked; + struct LookaheadRewriter; struct ProcessGenerator; }