X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=gas%2FChangeLog;h=7eb172c96bac8416f6f8b226dabae05d94d5e22e;hb=32c36c3ce94becbf0b8e1adad6ff28aa9d5e0b66;hp=669dd39f3a653f4a8f6ffb31733663b4672c7306;hpb=bec858ea4d0cef2d8be47b96669b803f73902014;p=binutils-gdb.git diff --git a/gas/ChangeLog b/gas/ChangeLog index 669dd39f3a6..7eb172c96ba 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,396 @@ +2019-04-15 Thomas Preud'homme + + * config/tc-arm.c (parse_sys_vldr_vstr): New function. + (OP_VLDR): New enum operand_parse_code enumerator. + (parse_operands): Add logic for OP_VLDR. + (do_t_vldr_vstr_sysreg): New function. + (do_vldr_vstr): Likewise. + (insns): Guard VLDR and VSTR by arm_ext_v4t for Thumb mode. + (md_apply_fix): Add bound check for VLDR and VSTR co-processor offset. + Add masking logic for BFD_RELOC_ARM_T32_VLDR_VSTR_OFF_IMM relocation. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Add examples of bad + uses of VLDR and VSTR. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Add error messages for + above bad uses. + * testsuite/gas/arm/archv8m_1m-cmse-main.s: Add examples of VLDR and + VSTR valid uses. + * testsuite/gas/arm/archv8m_1m-cmse-main.d: Add disassembly for the + above examples. + +2019-04-15 Thomas Preud'homme + + * config/tc-arm.c (arm_typed_reg_parse): Fix typo in comment. + (enum reg_list_els): New REGLIST_VFP_S_VPR and REGLIST_VFP_D_VPR + enumerators. + (parse_vfp_reg_list): Add new partial_match parameter. Set + *partial_match to TRUE if at least one element in the register list has + matched. Add support for REGLIST_VFP_S_VPR and REGLIST_VFP_D_VPR + register lists which expect VPR as last element in the list. + (s_arm_unwind_save_vfp_armv6): Adapt call to parse_vfp_reg_list to new + prototype. + (s_arm_unwind_save_vfp): Likewise. + (enum operand_parse_code): New OP_VRSDVLST enumerator. + (parse_operands): Adapt call to parse_vfp_reg_list to new prototype. + Handle new OP_VRSDVLST case. + (do_t_vscclrm): New function. + (insns): New entry for VSCCLRM instruction. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Add invalid VSCCLRM + instructions. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Add error expectations + for above instructions. + * testsuite/gas/arm/archv8m_1m-cmse-main.s: Add tests for VSCCLRM + instruction. + * testsuite/gas/arm/archv8m_1m-cmse-main.d: Add expected disassembly + for above instructions. + +2019-04-15 Thomas Preud'homme + + * config/tc-arm.c (enum reg_list_els): Define earlier and add + REGLIST_RN and REGLIST_CLRM enumerators. + (parse_reg_list): Add etype parameter to distinguish between regular + core register list and CLRM register list. Add logic to + recognize CLRM register list. + (parse_vfp_reg_list): Assert type is not for core register list. + (s_arm_unwind_save_core): Update call to parse_reg_list to new + prototype. + (enum operand_parse_code): Declare OP_CLRMLST enumerator. + (parse_operands): Update call to parse_reg_list to new prototype. Add + logic for OP_CLRMLST. + (encode_thumb2_ldmstm): Rename into ... + (encode_thumb2_multi): This. Add do_io parameter. Add logic to + encode CLRM and guard LDM/STM only code by do_io. + (do_t_ldmstm): Adapt to use encode_thumb2_multi. + (do_t_push_pop): Likewise. + (do_t_clrm): New function. + (insns): Define CLRM. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.d: New file. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Likewise. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Likewise. + * testsuite/gas/arm/archv8m_1m-cmse-main.d: Likewise. + * testsuite/gas/arm/archv8m_1m-cmse-main.s: Likewise. + +2019-04-15 Sudakshina Das + Andre Vieira + + * config/tc-arm.c (operand_parse_code): Add OP_LR and OP_oLR + for the LR operand and optional LR operand. + (parse_operands): Add switch cases for OP_LR and OP_oLR for + both type checking and value checking. + (encode_thumb32_addr_mode): New entries for DLS, WLS and LE. + (v8_1_loop_reloc): New helper function for handling labels + for the low overhead loop instructions. + (do_t_loloop): New function to encode DLS, WLS and LE. + (insns): New entries for WLS, DLS and LE. + (md_pcrel_from_section): New switch case + for BFD_RELOC_ARM_THUMB_LOOP12. + (md_appdy_fix): Likewise. + (tc_gen_reloc): Likewise. + * testsuite/gas/arm/armv8_1-m-tloop.s: New. + * testsuite/gas/arm/armv8_1-m-tloop.d: New. + * testsuite/gas/arm/armv8_1-m-tloop-bad.s: New. + * testsuite/gas/arm/armv8_1-m-tloop-bad.d: New. + * testsuite/gas/arm/armv8_1-m-tloop-bad.l: New. + +2019-04-15 Sudakshina Das + Andre Vieira + + * config/tc-arm.c (T16_32_TAB): New entriy for bfcsel. + (do_t_v8_1_branch): New switch case for bfcsel. + (toU): Define. + (insns): New instruction for bfcsel. + (md_pcrel_from_section): New switch case + for BFD_RELOC_THUMB_PCREL_BFCSEL. + (md_appdy_fix): Likewise + (tc_gen_reloc): Likewise. + * testsuite/gas/arm/armv8_1-m-bfcsel.d: New. + * testsuite/gas/arm/armv8_1-m-bfcsel.s: New. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (md_pcrel_from_section): New switch case for + BFD_RELOC_ARM_THUMB_BF13. + (md_appdy_fix): Likewise. + (tc_gen_reloc): Likewise. + +2019-04-15 Sudakshina Das + Andre Vieira + + * config/tc-arm.c (T16_32_TAB): New entrie for bfl. + (do_t_v8_1_branch): New switch case for bfl. + (insns): New instruction for bfl. + * testsuite/gas/arm/armv8_1-m-bfl.d: New. + * testsuite/gas/arm/armv8_1-m-bfl.s: New. + * testsuite/gas/arm/armv8_1-m-bfl-bad.s: New. + * testsuite/gas/arm/armv8_1-m-bfl-bad.d: New. + * testsuite/gas/arm/armv8_1-m-bfl-bad.l: New. + * testsuite/gas/arm/armv8_1-m-bfl-rel.d: New. + * testsuite/gas/arm/armv8_1-m-bfl-rel.s: New. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (md_pcrel_from_section): New switch case for + BFD_RELOC_ARM_THUMB_BF19. + (md_appdy_fix): Likewise. + (tc_gen_reloc): Likewise. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (T16_32_TAB): New entries for bfx and bflx. + (do_t_v8_1_branch): New switch cases for bfx and bflx. + (insns): New instruction for bfx and bflx. + * testsuite/gas/arm/armv8_1-m-bf-exchange.d: New. + * testsuite/gas/arm/armv8_1-m-bf-exchange.s: New. + * testsuite/gas/arm/armv8_1-m-bf-exchange-bad.s: New + * testsuite/gas/arm/armv8_1-m-bf-exchange-bad.l: New + * testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d: New + +2019-04-15 Sudakshina Das + Andre Vieira + + * config/tc-arm.c (T16_32_TAB): New entries for bf. + (do_t_branch_future): New. + (insns): New instruction for bf. + * testsuite/gas/arm/armv8_1-m-bf.d: New. + * testsuite/gas/arm/armv8_1-m-bf.s: New. + * testsuite/gas/arm/armv8_1-m-bf-bad.s: New. + * testsuite/gas/arm/armv8_1-m-bf-bad.l: New. + * testsuite/gas/arm/armv8_1-m-bf-bad.d: New. + * testsuite/gas/arm/armv8_1-m-bf-rel.d: New. + * testsuite/gas/arm/armv8_1-m-bf-rel.s: New. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (md_pcrel_from_section): New switch case for + BFD_RELOC_ARM_THUMB_BF17. + (md_appdy_fix): Likewise. + (tc_gen_reloc): Likewise. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (ARM_IT_MAX_RELOCS): New macro. + (arm_it): Member reloc renamed relocs and updated to an array. + Rest: Replace all occurrences of reloc to relocs[0]. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (md_pcrel_from_section): New switch case + for BFD_RELOC_THUMB_PCREL_BRANCH5. + (v8_1_branch_value_check): New function to check branch + offsets. + (md_appdy_fix): New switch case for + BFD_RELOC_THUMB_PCREL_BRANCH5. + (tc_gen_reloc): Likewise. + +2019-04-15 Andre Vieira + + * config/tc-arm.c (do_neon_movhf): Remove fp-armv8 check. + (armv8_1m_main_ext_table): New extension table. + (arm_archs): Use the new extension table. + * doc/c-arm.texi: Add missing arch and document new extensions. + * testsuite/gas/arm/armv8.1-m.main-fp.d: New. + * testsuite/gas/arm/armv8.1-m.main-fp-dp.d: New. + * testsuite/gas/arm/armv8.1-m.main-hp.d: New. + +2019-04-15 Thomas Preud'homme + + * config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline + Tag_CPU_arch build attribute value. Reindent. + (get_aeabi_cpu_arch_from_fset): Update assert. + (aeabi_set_public_attributes): Update assert for Tag_DIV_use logic. + * testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test. + +2019-04-09 Matthew Fortune + + * config/tc-mips.c (mips_cpu_info_table): Add i6500. Update + default ASEs for i6400. + * doc/c-mips.texi (-march): Document i6500. + * testsuite/gas/mips/elf_mach_i6400.d: New test. + * testsuite/gas/mips/elf_mach_i6500.d: New test. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2019-04-09 Matthew Fortune + + * config/tc-mips.c (mips_set_options) : New field. + (file_mips_opts, mips_opts) : Initialize new field. + (file_mips_check_options): Propagate initial ASE settings. + (mips_after_parse_args, parse_code_option): Track the initial + ASE settings for a CPU. + (s_mipsset): Restore the initial ASE settings when reverting + to the default arch. + * testsuite/gas/mips/elf_mach_p6600.d: New test. + * testsuite/gas/mips/mips.exp: Run the new test. + +2019-04-12 John Darrington + + config/tc-s12z.h: Remove definition of macro TC_M68K + +2019-04-01 John Darrington + + config/tc-s12z.c: Use bfd_boolean where appropriate. + +2019-04-11 Max Filippov + + * testsuite/gas/xtensa/loop-relax-2.d: New test definition. + * testsuite/gas/xtensa/loop-relax.d: New test definition. + * testsuite/gas/xtensa/loop-relax.s: New test source. + * testsuite/gas/xtensa/text-section-literals-1a.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-2.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-2.s: New test + source. + * testsuite/gas/xtensa/text-section-literals-2a.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-3.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-3.s: New test + source. + * testsuite/gas/xtensa/text-section-literals-4.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-4.s: New test + source. + * testsuite/gas/xtensa/text-section-literals-4a.d: New test + definition. + +2019-04-11 Max Filippov + + * testsuite/gas/xtensa/all.exp: Remove all expect-based + tests and all explicit run_dump_test / run_list_test + invocations. Add run_dump_tests for all .d files in the + test subdirectory. + * testsuite/gas/xtensa/entry_align.d: New test definition. + * testsuite/gas/xtensa/entry_align.l: New test output. + * testsuite/gas/xtensa/entry_misalign.d: New test definition. + * testsuite/gas/xtensa/entry_misalign2.d: New test definition. + * testsuite/gas/xtensa/j_too_far.d: New test definition. + * testsuite/gas/xtensa/j_too_far.l: New test output. + * testsuite/gas/xtensa/loop_align.d: New test definition. + * testsuite/gas/xtensa/loop_misalign.d: New test definition. + * testsuite/gas/xtensa/trampoline-2.d: New test definition. + * testsuite/gas/xtensa/trampoline-2.l: Remove empty output. + * testsuite/gas/xtensa/xtensa-err.exp: Use positive logic. + +2019-04-11 Max Filippov + + * config/tc-xtensa.c (xtensa_literal_pseudo): Drop code that has + no effect. + (get_literal_pool_location): Only search for the literal pool + when auto litpools is used, otherwise take one recorded in the + tc_segment_info_data. + (xtensa_assign_litpool_addresses): New function. + (xtensa_move_literals): Don't duplicate 'literal pool location + required...' error message. Call xtensa_assign_litpool_addresses. + +2019-04-11 Max Filippov + + * config/tc-xtensa.c (xtensa_is_init_fini): Add declaration. + (xtensa_mark_literal_pool_location): Don't add fill frag to literal + section that records literal pool location. + (md_begin): Call xtensa_mark_literal_pool_location when text + section literals or auto litpools are used. + (xtensa_elf_section_change_hook): Call + xtensa_mark_literal_pool_location when text section literals or + auto litpools are used, there's no literal pool location defined + for the current section and it's not .init or .fini. + * testsuite/gas/xtensa/auto-litpools-first1.d: Fix up addresses. + * testsuite/gas/xtensa/auto-litpools-first2.d: Likewise. + * testsuite/gas/xtensa/auto-litpools.d: Likewise. + +2019-04-11 Sudakshina Das + + * config/tc-aarch64.c (process_omitted_operand): Add case for + AARCH64_OPND_Rt_SP. + (parse_operands): Likewise. + * testsuite/gas/aarch64/armv8_5-a-memtag.d: Update tests. + * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. + * testsuite/gas/aarch64/illegal-memtag.l: Likewise. + * testsuite/gas/aarch64/illegal-memtag.s: Likewise. + +2019-04-11 Sudakshina Das + + * testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for ldgm and stgm. + * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. + * testsuite/gas/aarch64/illegal-memtag.l: Likewise. + * testsuite/gas/aarch64/illegal-memtag.s: Likewise. + +2019-04-10 Rainer Orth + + * config/tc-i386.c (need_plt32_p) [TE_SOLARIS]: Return FALSE. + * testsuite/gas/i386/solaris/solaris.exp: New driver. + * testsuite/gas/i386/solaris/reloc64.d, + testsuite/gas/i386/solaris/x86-64-jump.d, + testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d, + testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d, + testsuite/gas/i386/solaris/x86-64-nop-3.d, + testsuite/gas/i386/solaris/x86-64-nop-4.d, + testsuite/gas/i386/solaris/x86-64-nop-5.d, + testsuite/gas/i386/solaris/x86-64-relax-2.d, + testsuite/gas/i386/solaris/x86-64-relax-3.d: New tests. + * testsuite/gas/i386/reloc64.d, + testsuite/gas/i386/x86-64-jump.d, + testsuite/gas/i386/x86-64-mpx-branch-1.d, + testsuite/gas/i386/x86-64-mpx-branch-2.d, + testsuite/gas/i386/x86-64-nop-3.d, + testsuite/gas/i386/x86-64-nop-4.d, + testsuite/gas/i386/x86-64-nop-5.d, + testsuite/gas/i386/x86-64-relax-2.d, + testsuite/gas/i386/x86-64-relax-3.d: Skip on *-*-solaris*. + +2019-04-10 Alan Modra + + * config/te-cloudabi.h: New file. + * config/tc-aarch64.c (aarch64_after_parse_args): Use TE_CLOUDABI + rather than TARGET_OS to select cloudabi. + * config/tc-i386.h (ELF_TARGET_FORMAT64): Define for TE_CLOUDABI. + * configure.tgt (*-*-cloudabi*): Set em=cloudabi. + +2019-04-09 Robert Suchanek + + * testsuite/gas/mips/mips.exp: Run hwr-names test. + * testsuite/gas/mips/hwr-names.s: Add test cases for RDHWR with + the SEL field. + * testsuite/gas/mips/mipsr6@hwr-names.d: New file. + +2019-04-08 H.J. Lu + + * config/tc-i386.c (output_insn): Support + GNU_PROPERTY_X86_ISA_1_AVX512_BF16. + * testsuite/gas/i386/property-2.s: Add AVX512_BF16 test. + * testsuite/gas/i386/property-2.d: Updated. + * testsuite/gas/i386/x86-64-property-2.d: Likewise. + +2019-04-08 H.J. Lu + + * configure.tgt: Remove i386-*-kaos* and i386-*-chaos targets. + * testsuite/gas/i386/i386.exp: Remove *-*-caos* and "*-*-kaos* + check. + +2019-04-05 H.J. Lu + + * testsuite/gas/i386/i386.exp: Run -mx86-used-note=yes tests. + * testsuite/gas/i386/property-2.d: New file. + * testsuite/gas/i386/property-2.s: Likewise. + * testsuite/gas/i386/x86-64-property-2.d: Likewise. + +2019-04-05 Xuepeng Guo + + * config/tc-i386.c (cpu_arch): Add .avx512_bf16. + (cpu_noarch): Add noavx512_bf16. + * doc/c-i386.texi: Document avx512_bf16. + * testsuite/gas/i386/avx512_bf16.d: New file. + * testsuite/gas/i386/avx512_bf16.s: Likewise. + * testsuite/gas/i386/avx512_bf16_vl-inval.l: Likewise. + * testsuite/gas/i386/avx512_bf16_vl-inval.s: Likewise. + * testsuite/gas/i386/avx512_bf16_vl.d: Likewise. + * testsuite/gas/i386/avx512_bf16_vl.s: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16.d: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16.s: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.l: Likesie. + * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.s: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Likewise. + * testsuite/gas/i386/i386.exp: Add BF16 related tests. + 2019-04-05 Alan Modra * testsuite/gas/ppc/bc.s,