X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=gas%2FChangeLog;h=7eb172c96bac8416f6f8b226dabae05d94d5e22e;hb=32c36c3ce94becbf0b8e1adad6ff28aa9d5e0b66;hp=7d47d936810d1faef29444f88e2d386458401d18;hpb=c7af41ec2c79bb68d7c57907699edae5187bbfa6;p=binutils-gdb.git diff --git a/gas/ChangeLog b/gas/ChangeLog index 7d47d936810..7eb172c96ba 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,1066 @@ +2019-04-15 Thomas Preud'homme + + * config/tc-arm.c (parse_sys_vldr_vstr): New function. + (OP_VLDR): New enum operand_parse_code enumerator. + (parse_operands): Add logic for OP_VLDR. + (do_t_vldr_vstr_sysreg): New function. + (do_vldr_vstr): Likewise. + (insns): Guard VLDR and VSTR by arm_ext_v4t for Thumb mode. + (md_apply_fix): Add bound check for VLDR and VSTR co-processor offset. + Add masking logic for BFD_RELOC_ARM_T32_VLDR_VSTR_OFF_IMM relocation. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Add examples of bad + uses of VLDR and VSTR. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Add error messages for + above bad uses. + * testsuite/gas/arm/archv8m_1m-cmse-main.s: Add examples of VLDR and + VSTR valid uses. + * testsuite/gas/arm/archv8m_1m-cmse-main.d: Add disassembly for the + above examples. + +2019-04-15 Thomas Preud'homme + + * config/tc-arm.c (arm_typed_reg_parse): Fix typo in comment. + (enum reg_list_els): New REGLIST_VFP_S_VPR and REGLIST_VFP_D_VPR + enumerators. + (parse_vfp_reg_list): Add new partial_match parameter. Set + *partial_match to TRUE if at least one element in the register list has + matched. Add support for REGLIST_VFP_S_VPR and REGLIST_VFP_D_VPR + register lists which expect VPR as last element in the list. + (s_arm_unwind_save_vfp_armv6): Adapt call to parse_vfp_reg_list to new + prototype. + (s_arm_unwind_save_vfp): Likewise. + (enum operand_parse_code): New OP_VRSDVLST enumerator. + (parse_operands): Adapt call to parse_vfp_reg_list to new prototype. + Handle new OP_VRSDVLST case. + (do_t_vscclrm): New function. + (insns): New entry for VSCCLRM instruction. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Add invalid VSCCLRM + instructions. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Add error expectations + for above instructions. + * testsuite/gas/arm/archv8m_1m-cmse-main.s: Add tests for VSCCLRM + instruction. + * testsuite/gas/arm/archv8m_1m-cmse-main.d: Add expected disassembly + for above instructions. + +2019-04-15 Thomas Preud'homme + + * config/tc-arm.c (enum reg_list_els): Define earlier and add + REGLIST_RN and REGLIST_CLRM enumerators. + (parse_reg_list): Add etype parameter to distinguish between regular + core register list and CLRM register list. Add logic to + recognize CLRM register list. + (parse_vfp_reg_list): Assert type is not for core register list. + (s_arm_unwind_save_core): Update call to parse_reg_list to new + prototype. + (enum operand_parse_code): Declare OP_CLRMLST enumerator. + (parse_operands): Update call to parse_reg_list to new prototype. Add + logic for OP_CLRMLST. + (encode_thumb2_ldmstm): Rename into ... + (encode_thumb2_multi): This. Add do_io parameter. Add logic to + encode CLRM and guard LDM/STM only code by do_io. + (do_t_ldmstm): Adapt to use encode_thumb2_multi. + (do_t_push_pop): Likewise. + (do_t_clrm): New function. + (insns): Define CLRM. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.d: New file. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Likewise. + * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Likewise. + * testsuite/gas/arm/archv8m_1m-cmse-main.d: Likewise. + * testsuite/gas/arm/archv8m_1m-cmse-main.s: Likewise. + +2019-04-15 Sudakshina Das + Andre Vieira + + * config/tc-arm.c (operand_parse_code): Add OP_LR and OP_oLR + for the LR operand and optional LR operand. + (parse_operands): Add switch cases for OP_LR and OP_oLR for + both type checking and value checking. + (encode_thumb32_addr_mode): New entries for DLS, WLS and LE. + (v8_1_loop_reloc): New helper function for handling labels + for the low overhead loop instructions. + (do_t_loloop): New function to encode DLS, WLS and LE. + (insns): New entries for WLS, DLS and LE. + (md_pcrel_from_section): New switch case + for BFD_RELOC_ARM_THUMB_LOOP12. + (md_appdy_fix): Likewise. + (tc_gen_reloc): Likewise. + * testsuite/gas/arm/armv8_1-m-tloop.s: New. + * testsuite/gas/arm/armv8_1-m-tloop.d: New. + * testsuite/gas/arm/armv8_1-m-tloop-bad.s: New. + * testsuite/gas/arm/armv8_1-m-tloop-bad.d: New. + * testsuite/gas/arm/armv8_1-m-tloop-bad.l: New. + +2019-04-15 Sudakshina Das + Andre Vieira + + * config/tc-arm.c (T16_32_TAB): New entriy for bfcsel. + (do_t_v8_1_branch): New switch case for bfcsel. + (toU): Define. + (insns): New instruction for bfcsel. + (md_pcrel_from_section): New switch case + for BFD_RELOC_THUMB_PCREL_BFCSEL. + (md_appdy_fix): Likewise + (tc_gen_reloc): Likewise. + * testsuite/gas/arm/armv8_1-m-bfcsel.d: New. + * testsuite/gas/arm/armv8_1-m-bfcsel.s: New. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (md_pcrel_from_section): New switch case for + BFD_RELOC_ARM_THUMB_BF13. + (md_appdy_fix): Likewise. + (tc_gen_reloc): Likewise. + +2019-04-15 Sudakshina Das + Andre Vieira + + * config/tc-arm.c (T16_32_TAB): New entrie for bfl. + (do_t_v8_1_branch): New switch case for bfl. + (insns): New instruction for bfl. + * testsuite/gas/arm/armv8_1-m-bfl.d: New. + * testsuite/gas/arm/armv8_1-m-bfl.s: New. + * testsuite/gas/arm/armv8_1-m-bfl-bad.s: New. + * testsuite/gas/arm/armv8_1-m-bfl-bad.d: New. + * testsuite/gas/arm/armv8_1-m-bfl-bad.l: New. + * testsuite/gas/arm/armv8_1-m-bfl-rel.d: New. + * testsuite/gas/arm/armv8_1-m-bfl-rel.s: New. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (md_pcrel_from_section): New switch case for + BFD_RELOC_ARM_THUMB_BF19. + (md_appdy_fix): Likewise. + (tc_gen_reloc): Likewise. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (T16_32_TAB): New entries for bfx and bflx. + (do_t_v8_1_branch): New switch cases for bfx and bflx. + (insns): New instruction for bfx and bflx. + * testsuite/gas/arm/armv8_1-m-bf-exchange.d: New. + * testsuite/gas/arm/armv8_1-m-bf-exchange.s: New. + * testsuite/gas/arm/armv8_1-m-bf-exchange-bad.s: New + * testsuite/gas/arm/armv8_1-m-bf-exchange-bad.l: New + * testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d: New + +2019-04-15 Sudakshina Das + Andre Vieira + + * config/tc-arm.c (T16_32_TAB): New entries for bf. + (do_t_branch_future): New. + (insns): New instruction for bf. + * testsuite/gas/arm/armv8_1-m-bf.d: New. + * testsuite/gas/arm/armv8_1-m-bf.s: New. + * testsuite/gas/arm/armv8_1-m-bf-bad.s: New. + * testsuite/gas/arm/armv8_1-m-bf-bad.l: New. + * testsuite/gas/arm/armv8_1-m-bf-bad.d: New. + * testsuite/gas/arm/armv8_1-m-bf-rel.d: New. + * testsuite/gas/arm/armv8_1-m-bf-rel.s: New. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (md_pcrel_from_section): New switch case for + BFD_RELOC_ARM_THUMB_BF17. + (md_appdy_fix): Likewise. + (tc_gen_reloc): Likewise. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (ARM_IT_MAX_RELOCS): New macro. + (arm_it): Member reloc renamed relocs and updated to an array. + Rest: Replace all occurrences of reloc to relocs[0]. + +2019-04-15 Sudakshina Das + + * config/tc-arm.c (md_pcrel_from_section): New switch case + for BFD_RELOC_THUMB_PCREL_BRANCH5. + (v8_1_branch_value_check): New function to check branch + offsets. + (md_appdy_fix): New switch case for + BFD_RELOC_THUMB_PCREL_BRANCH5. + (tc_gen_reloc): Likewise. + +2019-04-15 Andre Vieira + + * config/tc-arm.c (do_neon_movhf): Remove fp-armv8 check. + (armv8_1m_main_ext_table): New extension table. + (arm_archs): Use the new extension table. + * doc/c-arm.texi: Add missing arch and document new extensions. + * testsuite/gas/arm/armv8.1-m.main-fp.d: New. + * testsuite/gas/arm/armv8.1-m.main-fp-dp.d: New. + * testsuite/gas/arm/armv8.1-m.main-hp.d: New. + +2019-04-15 Thomas Preud'homme + + * config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline + Tag_CPU_arch build attribute value. Reindent. + (get_aeabi_cpu_arch_from_fset): Update assert. + (aeabi_set_public_attributes): Update assert for Tag_DIV_use logic. + * testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test. + +2019-04-09 Matthew Fortune + + * config/tc-mips.c (mips_cpu_info_table): Add i6500. Update + default ASEs for i6400. + * doc/c-mips.texi (-march): Document i6500. + * testsuite/gas/mips/elf_mach_i6400.d: New test. + * testsuite/gas/mips/elf_mach_i6500.d: New test. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2019-04-09 Matthew Fortune + + * config/tc-mips.c (mips_set_options) : New field. + (file_mips_opts, mips_opts) : Initialize new field. + (file_mips_check_options): Propagate initial ASE settings. + (mips_after_parse_args, parse_code_option): Track the initial + ASE settings for a CPU. + (s_mipsset): Restore the initial ASE settings when reverting + to the default arch. + * testsuite/gas/mips/elf_mach_p6600.d: New test. + * testsuite/gas/mips/mips.exp: Run the new test. + +2019-04-12 John Darrington + + config/tc-s12z.h: Remove definition of macro TC_M68K + +2019-04-01 John Darrington + + config/tc-s12z.c: Use bfd_boolean where appropriate. + +2019-04-11 Max Filippov + + * testsuite/gas/xtensa/loop-relax-2.d: New test definition. + * testsuite/gas/xtensa/loop-relax.d: New test definition. + * testsuite/gas/xtensa/loop-relax.s: New test source. + * testsuite/gas/xtensa/text-section-literals-1a.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-2.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-2.s: New test + source. + * testsuite/gas/xtensa/text-section-literals-2a.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-3.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-3.s: New test + source. + * testsuite/gas/xtensa/text-section-literals-4.d: New test + definition. + * testsuite/gas/xtensa/text-section-literals-4.s: New test + source. + * testsuite/gas/xtensa/text-section-literals-4a.d: New test + definition. + +2019-04-11 Max Filippov + + * testsuite/gas/xtensa/all.exp: Remove all expect-based + tests and all explicit run_dump_test / run_list_test + invocations. Add run_dump_tests for all .d files in the + test subdirectory. + * testsuite/gas/xtensa/entry_align.d: New test definition. + * testsuite/gas/xtensa/entry_align.l: New test output. + * testsuite/gas/xtensa/entry_misalign.d: New test definition. + * testsuite/gas/xtensa/entry_misalign2.d: New test definition. + * testsuite/gas/xtensa/j_too_far.d: New test definition. + * testsuite/gas/xtensa/j_too_far.l: New test output. + * testsuite/gas/xtensa/loop_align.d: New test definition. + * testsuite/gas/xtensa/loop_misalign.d: New test definition. + * testsuite/gas/xtensa/trampoline-2.d: New test definition. + * testsuite/gas/xtensa/trampoline-2.l: Remove empty output. + * testsuite/gas/xtensa/xtensa-err.exp: Use positive logic. + +2019-04-11 Max Filippov + + * config/tc-xtensa.c (xtensa_literal_pseudo): Drop code that has + no effect. + (get_literal_pool_location): Only search for the literal pool + when auto litpools is used, otherwise take one recorded in the + tc_segment_info_data. + (xtensa_assign_litpool_addresses): New function. + (xtensa_move_literals): Don't duplicate 'literal pool location + required...' error message. Call xtensa_assign_litpool_addresses. + +2019-04-11 Max Filippov + + * config/tc-xtensa.c (xtensa_is_init_fini): Add declaration. + (xtensa_mark_literal_pool_location): Don't add fill frag to literal + section that records literal pool location. + (md_begin): Call xtensa_mark_literal_pool_location when text + section literals or auto litpools are used. + (xtensa_elf_section_change_hook): Call + xtensa_mark_literal_pool_location when text section literals or + auto litpools are used, there's no literal pool location defined + for the current section and it's not .init or .fini. + * testsuite/gas/xtensa/auto-litpools-first1.d: Fix up addresses. + * testsuite/gas/xtensa/auto-litpools-first2.d: Likewise. + * testsuite/gas/xtensa/auto-litpools.d: Likewise. + +2019-04-11 Sudakshina Das + + * config/tc-aarch64.c (process_omitted_operand): Add case for + AARCH64_OPND_Rt_SP. + (parse_operands): Likewise. + * testsuite/gas/aarch64/armv8_5-a-memtag.d: Update tests. + * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. + * testsuite/gas/aarch64/illegal-memtag.l: Likewise. + * testsuite/gas/aarch64/illegal-memtag.s: Likewise. + +2019-04-11 Sudakshina Das + + * testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for ldgm and stgm. + * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. + * testsuite/gas/aarch64/illegal-memtag.l: Likewise. + * testsuite/gas/aarch64/illegal-memtag.s: Likewise. + +2019-04-10 Rainer Orth + + * config/tc-i386.c (need_plt32_p) [TE_SOLARIS]: Return FALSE. + * testsuite/gas/i386/solaris/solaris.exp: New driver. + * testsuite/gas/i386/solaris/reloc64.d, + testsuite/gas/i386/solaris/x86-64-jump.d, + testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d, + testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d, + testsuite/gas/i386/solaris/x86-64-nop-3.d, + testsuite/gas/i386/solaris/x86-64-nop-4.d, + testsuite/gas/i386/solaris/x86-64-nop-5.d, + testsuite/gas/i386/solaris/x86-64-relax-2.d, + testsuite/gas/i386/solaris/x86-64-relax-3.d: New tests. + * testsuite/gas/i386/reloc64.d, + testsuite/gas/i386/x86-64-jump.d, + testsuite/gas/i386/x86-64-mpx-branch-1.d, + testsuite/gas/i386/x86-64-mpx-branch-2.d, + testsuite/gas/i386/x86-64-nop-3.d, + testsuite/gas/i386/x86-64-nop-4.d, + testsuite/gas/i386/x86-64-nop-5.d, + testsuite/gas/i386/x86-64-relax-2.d, + testsuite/gas/i386/x86-64-relax-3.d: Skip on *-*-solaris*. + +2019-04-10 Alan Modra + + * config/te-cloudabi.h: New file. + * config/tc-aarch64.c (aarch64_after_parse_args): Use TE_CLOUDABI + rather than TARGET_OS to select cloudabi. + * config/tc-i386.h (ELF_TARGET_FORMAT64): Define for TE_CLOUDABI. + * configure.tgt (*-*-cloudabi*): Set em=cloudabi. + +2019-04-09 Robert Suchanek + + * testsuite/gas/mips/mips.exp: Run hwr-names test. + * testsuite/gas/mips/hwr-names.s: Add test cases for RDHWR with + the SEL field. + * testsuite/gas/mips/mipsr6@hwr-names.d: New file. + +2019-04-08 H.J. Lu + + * config/tc-i386.c (output_insn): Support + GNU_PROPERTY_X86_ISA_1_AVX512_BF16. + * testsuite/gas/i386/property-2.s: Add AVX512_BF16 test. + * testsuite/gas/i386/property-2.d: Updated. + * testsuite/gas/i386/x86-64-property-2.d: Likewise. + +2019-04-08 H.J. Lu + + * configure.tgt: Remove i386-*-kaos* and i386-*-chaos targets. + * testsuite/gas/i386/i386.exp: Remove *-*-caos* and "*-*-kaos* + check. + +2019-04-05 H.J. Lu + + * testsuite/gas/i386/i386.exp: Run -mx86-used-note=yes tests. + * testsuite/gas/i386/property-2.d: New file. + * testsuite/gas/i386/property-2.s: Likewise. + * testsuite/gas/i386/x86-64-property-2.d: Likewise. + +2019-04-05 Xuepeng Guo + + * config/tc-i386.c (cpu_arch): Add .avx512_bf16. + (cpu_noarch): Add noavx512_bf16. + * doc/c-i386.texi: Document avx512_bf16. + * testsuite/gas/i386/avx512_bf16.d: New file. + * testsuite/gas/i386/avx512_bf16.s: Likewise. + * testsuite/gas/i386/avx512_bf16_vl-inval.l: Likewise. + * testsuite/gas/i386/avx512_bf16_vl-inval.s: Likewise. + * testsuite/gas/i386/avx512_bf16_vl.d: Likewise. + * testsuite/gas/i386/avx512_bf16_vl.s: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16.d: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16.s: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.l: Likesie. + * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.s: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Likewise. + * testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Likewise. + * testsuite/gas/i386/i386.exp: Add BF16 related tests. + +2019-04-05 Alan Modra + + * testsuite/gas/ppc/bc.s, + * testsuite/gas/ppc/bcat.d, + * testsuite/gas/ppc/bcaterr.d, + * testsuite/gas/ppc/bcaterr.l, + * testsuite/gas/ppc/bcy.d, + * testsuite/gas/ppc/bcyerr.d, + * testsuite/gas/ppc/bcyerr.l: New tests. + * testsuite/gas/ppc/ppc.exp: Run them. + +2019-04-05 Alan Modra + + * testsuite/gas/ppc/476.d: Remove trailing spaces. + * testsuite/gas/ppc/a2.d: Likewise. + * testsuite/gas/ppc/booke.d: Likewise. + * testsuite/gas/ppc/booke_xcoff.d: Likewise. + * testsuite/gas/ppc/e500.d: Likewise. + * testsuite/gas/ppc/e500mc.d: Likewise. + * testsuite/gas/ppc/e6500.d: Likewise. + * testsuite/gas/ppc/htm.d: Likewise. + * testsuite/gas/ppc/power6.d: Likewise. + * testsuite/gas/ppc/power8.d: Likewise. + * testsuite/gas/ppc/power9.d: Likewise. + * testsuite/gas/ppc/vle.d: Likewise. + +2019-04-04 Peter Bergner + + PR gas/24349 + * testsuite/gas/ppc/power8.s: (bdnztar, bdnztarl, bdztar, bdztarl, + btar, btarl, bdnztar-, bdnztarl-, bdnztar+, bdnztarl+, bdztar-, + bdztarl-, bdztar+, bdztarl+, bgetar, bnltar, bgetarl, bnltarl, + bletar, bngtar, bletarl, bngtarl, bnetar, bnetarl, bnstar, bnutar, + bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-, bnltarl-, bletar-, + bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-, bnstar-, bnutar-, + bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+, bnltarl+, bletar+, + bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+, bnstar+, bnutar+, + bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl, beqtar, + beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-, + bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-, + buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+, + bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar, + bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar, + bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+, + bttarl+): Add tests of extended mnemonics. + * testsuite/gas/ppc/power8.d: Likewise. Update previous bctar tests + to expect new extended mnemonics. + * testsuite/gas/ppc/a2.s: : Update test + to not use illegal BO value. Use a more convenient BI value. + * testsuite/gas/ppc/a2.d: Update tests for new expect output. + +2019-04-03 Max Filippov + + * config/tc-xtensa.c (convert_frag_immed): Drop + convert_frag_immed_finish_loop invocation. + (convert_frag_immed_finish_loop): Drop declaration and + definition. + * config/xtensa-relax.c (widen_spec_list): Replace loop + widening that uses addi/addmi with widening that uses l32r + and const16. + +2019-04-01 Andre Vieira + + * config/tc-arm.c (arm_ext_table): New struct type. + (arm_arch_option_table): Add new 'arm_ext_table' field. + (ARM_EXT,ARM_ADD,ARM_REMOVE, ALL_FP): New macros. + (armv5te_ext_table, armv7ve_ext_table, armv7a_ext_table, + armv7r_ext_table, armv7em_ext_table, armv8a_ext_table, + armv81a_ext_table, armv82a_ext_table, armv84a_ext_table, + armv85a_ext_table, armv8m_main_ext_table, + armv8r_ext_table): New architecture extension tables. + (ARM_ARCH_OPT): Add new default field. + (ARM_ARCH_OPT2): New macro. + (arm_archs): Extend some architectures with the new architecture + extension tables mentioned above. + (arm_extensions): Add DEPRECATED comment with instructions to + use new table. + (arm_parse_extension): Change to use new extension tables. + (arm_parse_cpu): Don't change existing behavior. + (arm_parse_arch): Change to use new extension tables. + * doc/c-arm.texi: Document new architecture extensions. + * testsuite/gas/arm/attr-mfpu-neon-fp16.d: Change test to use new + extension option rather than -mfpu and change expected behaviour to + sane outputs. + * testsuite/gas/arm/armv8-2-fp16-scalar-bad-ext.d: New. + * testsuite/gas/arm/armv8-2-fp16-scalar-ext.d: New. + * testsuite/gas/arm/armv8-2-fp16-scalar-thumb-ext.d: New. + * testsuite/gas/arm/armv8-2-fp16-simd-ext.d: New. + * testsuite/gas/arm/armv8-2-fp16-simd-thumb-ext.d: New. + * testsuite/gas/arm/armv8-2-fp16-simd-warning-ext.d: New. + * testsuite/gas/arm/armv8-2-fp16-simd-warning-thumb-ext.d: New. + * testsuite/gas/arm/armv8_2+rdma-ext.d: New. + * testsuite/gas/arm/armv8_2-a-fp16-thumb2-ext.d: New. + * testsuite/gas/arm/armv8_2-a-fp16_ext.d: New. + * testsuite/gas/arm/armv8_3-a-fp-bad-ext.d: New. + * testsuite/gas/arm/armv8_3-a-fp-ext.d: New. + * testsuite/gas/arm/armv8_3-a-fp16-ext.d: New. + * testsuite/gas/arm/armv8_3-a-simd-bad-ext.d: New. + * testsuite/gas/arm/armv8_4-a-fp16-ext.d: New. + * testsuite/gas/arm/armv8m.main+fp.d: New. + * testsuite/gas/arm/armv8m.main+fp.dp.d: New. + * testsuite/gas/arm/attr-ext-fpv5-d16.d: New. + * testsuite/gas/arm/attr-ext-fpv5.d: New. + * testsuite/gas/arm/attr-ext-idiv.d: New. + * testsuite/gas/arm/attr-ext-mp.d: New. + * testsuite/gas/arm/attr-ext-neon-fp16.d: New. + * testsuite/gas/arm/attr-ext-neon-vfpv3.d: New. + * testsuite/gas/arm/attr-ext-neon-vfpv4.d: New. + * testsuite/gas/arm/attr-ext-sec.d: New. + * testsuite/gas/arm/attr-ext-vfpv3-d16-fp16.d: New. + * testsuite/gas/arm/attr-ext-vfpv3-d16.d: New. + * testsuite/gas/arm/attr-ext-vfpv3-fp16.d: New. + * testsuite/gas/arm/attr-ext-vfpv3.d: New. + * testsuite/gas/arm/attr-ext-vfpv3xd-fp.d: New. + * testsuite/gas/arm/attr-ext-vfpv3xd.d: New. + * testsuite/gas/arm/attr-ext-vfpv4-d16.d: New. + * testsuite/gas/arm/attr-ext-vfpv4-sp-d16.d: New. + * testsuite/gas/arm/attr-ext-vfpv4.d: New. + * testsuite/gas/arm/dotprod-mandatory-ext.d: New. + * testsuite/gas/arm/fpv5-d16.s: New. + * testsuite/gas/arm/fpv5-sp-d16.s: New. + +2019-03-28 Alan Modra + + PR 24390 + * testsuite/gas/ppc/476.d: Update mtfsb*. + * testsuite/gas/ppc/a2.d: Likewise. + +2019-03-21 Alan Modra + + * emul.h (struct emulation): Delete strip_underscore. + * emul-target.h (emul_strip_underscore): Don't define. + (emul_struct_name): Update initialization. + +2019-03-21 Alan Modra + + * config/tc-d10v.c (md_apply_fix): Apply BFD_RELOC_8. + * config/tc-pdp11.c (md_apply_fix): Likewise. + * config/tc-d30v.c (md_apply_fix): Don't emit errors for BFD_RELOC_8, + BFD_RELOC_16, and BFD_RELOC_64. + * testsuite/gas/all/gas.exp: Move target exclusions for forward + test, but not cr16, to.. + * testsuite/gas/all/forward.d: ..here, with explanation. Remove + d10v, d30v, and pdp11 xfails. + +2019-03-19 H.J. Lu + + * config/tc-i386.c (optimize_encoding): Don't check AVX for + EVEX vector load/store optimization. Check both operands for + ZMM register. Update EVEX vector load/store opcode check. + Choose EVEX Disp8 over VEX Disp32. + * testsuite/gas/i386/optimize-1.d: Updated. + * testsuite/gas/i386/optimize-1a.d: Likewise. + * testsuite/gas/i386/optimize-2.d: Likewise. + * testsuite/gas/i386/optimize-4.d: Likewise. + * testsuite/gas/i386/optimize-5.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-2.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-2a.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-2b.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-3.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-5.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-6.d: Likewise. + * testsuite/gas/i386/optimize-1.s: Add ZMM register load + test. + * testsuite/gas/i386/x86-64-optimize-2.s: Likewise. + +2019-03-19 H.J. Lu + + PR gas/24352 + * config/tc-i386.c (optimize_encoding): Check only + cpu_arch_flags.bitfield.cpuavx512vl. + * testsuite/gas/i386/i386.exp: Run x86-64-optimize-2b. + * testsuite/gas/i386/x86-64-optimize-2.d: Revert the last + change. + * testsuite/gas/i386/x86-64-optimize-2b.d: New file. + * testsuite/gas/i386/x86-64-optimize-2b.s: Likewise. + +2019-03-19 H.J. Lu + + PR gas/24359 + * testsuite/gas/i386/i386.exp: Change optimize-6a, optimize-7, + x86-64-optimize-7a and x86-64-optimize-8 tests to run_list_test. + Remove optimize-6c and x86-64-optimize-7c tests. + * testsuite/gas/i386/noavx-3.l: Updated. + * testsuite/gas/i386/noavx-4.d: Likewise. + * testsuite/gas/i386/noavx-5.d: Likewise. + * testsuite/gas/i386/noavx-3.s: Add AVX512F tests. + * testsuite/gas/i386/noavx-4.s: Remove AVX512F tests. + * testsuite/gas/i386/nosse-5.s: Likewise. + * testsuite/gas/i386/optimize-6a.d: Removed. + * testsuite/gas/i386/optimize-6c.d: Likewise. + * testsuite/gas/i386/optimize-7.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-7a.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-7c.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-8.d: Likewise. + * testsuite/gas/i386/optimize-6a.l: New file. + * testsuite/gas/i386/optimize-6a.s: Likewise. + * testsuite/gas/i386/optimize-7.l: Likewise. + * testsuite/gas/i386/x86-64-optimize-7a.l: Likewise. + * testsuite/gas/i386/x86-64-optimize-7a.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-8.l: Likewise. + +2019-03-18 Alan Modra + + * config/m68k-parse.y (yylex): Use temp_ilp and restore_ilp. + * as.c (macro_expr): Likewise. + * macro.c (buffer_and_nest): Likewise. + * read.c (temp_ilp): Remove FIXME. + +2019-03-18 H.J. Lu + + * testsuite/gas/i386/att-regs.d: Pass -O0 to assembler. + * testsuite/gas/i386/avx512bw-intel.d: Likewise. + * testsuite/gas/i386/avx512bw.d: Likewise. + * testsuite/gas/i386/avx512f-intel.d: Likewise. + * testsuite/gas/i386/avx512f.d: Likewise. + * testsuite/gas/i386/disp32.d: Likewise. + * testsuite/gas/i386/intel-regs.d: Likewise. + * testsuite/gas/i386/pseudos.d: Likewise. + * testsuite/gas/i386/x86-64-disp32.d: Likewise. + * testsuite/gas/i386/x86-64-pseudos.d: Likewise. + +2019-03-18 H.J. Lu + + PR gas/24348 + * config/tc-i386.c (optimize_encoding): Encode 128-bit and + 256-bit EVEX vector register load/store instructions as VEX + vector register load/store instructions for -O1. + * doc/c-i386.texi: Update -O1 documentation. + * testsuite/gas/i386/i386.exp: Run PR gas/24348 tests. + * testsuite/gas/i386/optimize-1.s: Add tests for EVEX vector + load/store instructions. + * testsuite/gas/i386/optimize-2.s: Likewise. + * testsuite/gas/i386/optimize-3.s: Likewise. + * testsuite/gas/i386/optimize-5.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-2.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-3.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-4.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-5.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-6.s: Likewise. + * testsuite/gas/i386/optimize-1.d: Updated. + * testsuite/gas/i386/optimize-2.d: Likewise. + * testsuite/gas/i386/optimize-3.d: Likewise. + * testsuite/gas/i386/optimize-4.d: Likewise. + * testsuite/gas/i386/optimize-5.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-2.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-3.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-4.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-5.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-6.d: Likewise. + * testsuite/gas/i386/optimize-7.d: New file. + * testsuite/gas/i386/optimize-7.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-8.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-8.s: Likewise. + +2019-03-18 H.J. Lu + + * config/tc-i386.c (optimize_encoding): Encode 256-bit/512-bit + VEX/EVEX vector register clearing instructions with 128-bit VEX + vector register clearing instructions at -O1. + * doc/c-i386.texi: Update -O1 and -O2 documentation. + * testsuite/gas/i386/i386.exp: Run optimize-1a and + x86-64-optimize-2a. + * testsuite/gas/i386/optimize-1a.d: New file. + * testsuite/gas/i386/x86-64-optimize-2a.d: Likewise. + +2019-03-17 H.J. Lu + + PR gas/24353 + * config/tc-i386.c: Include if it exists and try + including if we have it. + (INT_MAX): Define if not defined. + (md_parse_option): Set optimize to INT_MAX for -Os. + * testsuite/gas/i386/optimize-2.s: Add a test. + * testsuite/gas/i386/x86-64-optimize-3.s: Likewise. + * testsuite/gas/i386/optimize-2.d: Updated. + * testsuite/gas/i386/x86-64-optimize-3.d: Likewise. + +2019-03-17 H.J. Lu + + PR gas/24352 + * config/tc-i386.c (optimize_encoding): Encode 512-bit EVEX + with 128-bit VEX encoding only when AVX is enabled and with + 128-bit EVEX encoding only when AVX512VL is enabled. + * testsuite/gas/i386/i386.exp: Run PR gas/24352 tests. + * testsuite/gas/i386/optimize-6.s: New file. + * testsuite/gas/i386/optimize-6a.d: Likewise. + * testsuite/gas/i386/optimize-6b.d: Likewise. + * testsuite/gas/i386/optimize-6c.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-7.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-7a.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-7b.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-7c.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-2.d: Updated. + +2019-03-15 Li Hao + + PR 24308 + * config/tc-i386.c (parse_insn): Check mnemp before using it to + determine if a suffix can be trimmed. + +2019-03-13 Christian Eggers + + * dwarf2dbg.c (out_set_addr): Align relocation within .debug_line. + +2019-03-13 Christian Eggers + + * dwarf2dbg.c (out_debug_line): Pad size of .debug_line section. + +2019-03-13 Christian Eggers + + * dwarf2dbg.c (out_debug_str): Use octets for .debug_string pointers. + +2019-03-13 Christian Eggers + + * dwarf2dbg.c (out_debug_line): Use octets for .debug_line prologue. + +2019-03-13 Christian Eggers + + * dwarf2dbg.c (out_debug_line): Use octets for dwarf2 headers. + (out_debug_aranges, out_debug_info): Likewise. + +2019-03-13 Christian Eggers + + * symbols.h (symbol_temp_new_now_octets): Declare. + (symbol_set_value_now_octets, symbol_octets_p): Declare. + * symbols.c (struct symbol_flags): New member sy_octets. + (symbol_temp_new_now_octets): New function. + (resolve_symbol_value): Return octets instead of bytes if + sy_octets is set. + (symbol_set_value_now_octets): New function. + (symbol_octets_p): New function. + +2019-03-13 Christian Eggers + + * dwarf2dbg.c (dwarf2_emit_insn): Fix calculation of line info offset. + +2019-03-12 Andreas Krebbel + + * testsuite/gas/s390/zarch-arch13.s: Adjust testcase to optable changes. + * testsuite/gas/s390/zarch-arch13.d: Likewise. + +2019-02-27 Matthew Malcomson + + * testsuite/gas/aarch64/dotproduct.d: Use multiple "as" lines. + * testsuite/gas/aarch64/dotproduct_armv8_4.d: Remove. + * testsuite/gas/aarch64/dotproduct_armv8_4.s: Remove. + * testsuite/gas/aarch64/illegal-dotproduct.d: Use multiple "as" + lines. + * testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: Remove. + * testsuite/gas/aarch64/ldst-rcpc.d: Use multiple "as" lines. + +2019-02-24 Alan Modra + + * config/tc-ppc.c (parse_tls_arg): Wrap in #ifdef OBJ_ELF. + +2019-02-24 Alan Modra + + PR 24144 + * config/obj-aout.c (obj_aout_frob_file_before_fix): Write to end + of section to ensure file contents cover aligned section size. + +2019-02-22 Kyrylo Tkachov + + * config/tc-arm.c (arm_cpus): Add neoverse-n1. + * doc/c-arm.texi (-mcpu): Document neoverse-n1 value. + +2019-02-22 Kyrylo Tkachov + + * config/tc-aarch64.c (aarch64_cpus): Add neoverse-e1. + * doc/c-aarch64.texi (-mcpu): Document neoverse-e1 value. + +2019-02-22 Kyrylo Tkachov + + * config/tc-aarch64.c (aarch64_cpus): Add neoverse-n1. + * doc/c-aarch64.texi (-mcpu): Document neoverse-n1 value. + +2019-02-19 Paul Hua + + * NEWS: Mention -m[no-]fix-loongson3-llsc. + * configure.ac: Add --enable-mips-fix-loongson3-llsc. + Define DEFAULT_MIPS_FIX_LOONGSON3_LLSC. + * config.in: Regenerated. + * configure: Likewise. + * config/tc-mips.c (sync_insn, mips_fix_loongson3_llsc): + New variables. + (options): New OPTION_FIX_LOONGSON3_LLSC, + OPTION_NO_FIX_LOONGSON3_LLSC. + (md_longopts): Add -m[no-]fix-loongson3-llsc. + (md_begin): Initialize sync insn. + (fix_loongson3_llsc): New. + (append_insn): Call fix_loongson3_llsc. + (md_parse_option): Handle OPTION_FIX_LOONGSON3_LLSC, + OPTION_NO_FIX_LOONGSON3_LLSC. + (md_show_usage): Display -m[no-]fix-loongson3-llsc. + * doc/c-mips.texi: Document -m[no-]fix-loongson3-llsc, + --enable-mips-fix-loongson3-llsc=[yes|no]. + +2019-02-10 H.J. Lu + + PR gas/24165 + * frags.c (frag_var_init): Pass max_chars to TC_FRAG_INIT as + max_bytes. + * config/tc-aarch64.h (TC_FRAG_INIT): Add and pass max_bytes to + aarch64_init_frag. + * /config/tc-arm.h (TC_FRAG_INIT): And and pass max_bytes to + arm_init_frag. + * config/tc-avr.h (TC_FRAG_INIT): And and ignore max_bytes. + * config/tc-ia64.h (TC_FRAG_INIT): Likewise. + * config/tc-mmix.h (TC_FRAG_INIT): Likewise. + * config/tc-nds32.h (TC_FRAG_INIT): Likewise. + * config/tc-ns32k.h (TC_FRAG_INIT): Likewise. + * config/tc-rl78.h (TC_FRAG_INIT): Likewise. + * config/tc-rx.h (TC_FRAG_INIT): Likewise. + * config/tc-score.h (TC_FRAG_INIT): Likewise. + * config/tc-tic54x.h (TC_FRAG_INIT): Likewise. + * config/tc-tic6x.h (TC_FRAG_INIT): Likewise. + * config/tc-xtensa.h (TC_FRAG_INIT): Likewise. + * config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Set to + (alignment ? ((1 << alignment) - 1) : 1) + (i386_tc_frag_data): Add max_bytes. + (TC_FRAG_INIT): Add and track max_bytes. + (HANDLE_ALIGN): Replace MAX_MEM_FOR_RS_ALIGN_CODE with + fragP->tc_frag_data.max_bytes. + * doc/internals.texi: Update TC_FRAG_TYPE with max_bytes. + +2019-02-08 Jim Wilson + + * config/tc-riscv.c (validate_riscv_insn) <'C'>: Add 'z' support. + (riscv_ip) <'C'>: Add 'z' support. + +2019-02-07 Tamar Christina + + * config/tc-arm.c (insns): Redefine THUMB_VARIANT and ARM_VARIANT for + hlt to armv1. + * testsuite/gas/arm/armv8a-automatic-hlt.d: Update TAGs + * testsuite/gas/arm/hlt.d: New test. + * testsuite/gas/arm/hlt.s: New test. + +2019-02-07 Tamar Christina + + * testsuite/gas/aarch64/undefined_advsimd_armv8_3.d: New test. + * testsuite/gas/aarch64/undefined_advsimd_armv8_3.s: New test. + +2019-02-07 Tamar Christina + + PR binutils/23212 + * testsuite/gas/aarch64/undefined_by_elem_sz_l.s: New test. + * testsuite/gas/aarch64/undefined_by_elem_sz_l.d: New test. + +2019-02-07 Eric Botcazou + + * config/tc-visium.c (md_assemble) : Align instruction on + 64-bit boundaries for the GR6. + * testsuite/gas/visium/allinsn_gr6.s: Tweak. + * testsuite/gas/visium/allinsn_gr6.d: Likewise. + * testsuite/gas/visium/bra-1.d: New test. + * testsuite/gas/visium/bra-1.s: Likewise. + * testsuite/gas/visium/visium.exp: Run bra-1 test. + +2019-01-31 John Darrington + + * config/tc-s12z.c (lex_imm): Add new argument exp_o. + (emit_reloc): New function. + (md_apply_fix): [BFD_RELOC_S12Z_OPR] Recognise that it + can be either 2 bytes or 3 bytes long. + * testsuite/gas/s12z/mov-imm-reloc.d: New file. + * testsuite/gas/s12z/mov-imm-reloc.s: New file. + * testsuite/gas/s12z/s12z.exp: Add them. + +2019-01-31 John Darrington + + * config/tc-s12z.c (md_apply_fix): Fix incorrect limits. + * testsuite/gas/s12z/pc-rel-bad.d: New file. + * testsuite/gas/s12z/pc-rel-bad.l: New file. + * testsuite/gas/s12z/pc-rel-bad.s: New file. + * testsuite/gas/s12z/pc-rel-good.d: New file. + * testsuite/gas/s12z/pc-rel-good.s: New file. + * testsuite/gas/s12z/s12z.exp: Add them. + +2019-01-31 John Darrington + + * config/tc-s12z.c (tfr): Emit warning if operands are the same. + * testsuite/gas/s12z/exg.d: New test case. + * testsuite/gas/s12z/exg.l: New file. + +2019-01-31 John Darrington + + * config/tc-s12z.c (lex_opr): Add a parameter to indicate whether + immediate mode operands should be permitted. + * testsuite/s12z/imm-dest.d: New file. + * testsuite/s12z/imm-dest.l: New file. + * testsuite/s12z/imm-dest.s: New file. + * testsuite/s12z/s12z.exp: Add them. + +2019-01-31 Andreas Krebbel + + * config/tc-s390.c (s390_parse_cpu): New entry for arch13. + * doc/c-s390.texi: Document arch13 march option. + * testsuite/gas/s390/s390.exp: Run the arch13 related tests. + * testsuite/gas/s390/zarch-arch13.d: New test. + * testsuite/gas/s390/zarch-arch13.s: New test. + * testsuite/gas/s390/zarch-z13.d: Expect the renamed mnemonics + also for z13. + +2019-01-31 Alan Modra + + * config/tc-alpha.c (md_apply_fix): Correct range checks for + BFD_RELOC_ALPHA_NOP, BFD_RELOC_ALPHA_LDA, BFD_RELOC_ALPHA_BSR. + * config/tc-arm.c (md_apply_fix): Use llabs rather than abs. + * config/tc-csky.c (get_macro_reg_vals): Pass s to csky_show_error. + +2019-01-28 Max Filippov + + * config/tc-xtensa.c (md_apply_fix): Mark fixups for constant + symbols as done in md_apply_fix. + * testsuite/gas/all/forward.d: Don't XFAIL for xtensa. + +2019-01-28 Nick Clifton + + * po/fr.po: Updated French translation. + * po/ru.po: Updated Russian translation. + +2019-01-28 Alan Modra + + * configure.ac (ac_checking): Set from bfd/development.sh + development variable. + * configure: Regenerate. + +2019-01-25 Sudakshina Das + + * config/tc-aarch64.c (warn_unpredictable_ldst): Exempt + stg, st2g, stzg and stz2g from Xt == Xn with writeback warning. + * testsuite/gas/aarch64/armv8_5-a-memtag.d: Change tests for + stg, stzg, st2g and stz2g. + * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. + * testsuite/gas/aarch64/illegal-memtag.l: Likewise. + * testsuite/gas/aarch64/illegal-memtag.s: Likewise. + +2019-01-25 Sudakshina Das + + * testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for stzgm. + * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. + * testsuite/gas/aarch64/illegal-memtag.l: Likewise. + * testsuite/gas/aarch64/illegal-memtag.s: Likewise. + +2019-01-25 Sudakshina Das + Ramana Radhakrishnan + + * config/tc-aarch64.c (parse_address_main): Remove support for + [base]! address expression. + (parse_operands): Remove support for AARCH64_OPND_ADDR_SIMPLE_2. + (warn_unpredictable_ldst): Remove support for ldstgv_indexed. + * testsuite/gas/aarch64/armv8_5-a-memtag.d: Remove tests for ldgv + and stgv. + * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. + * testsuite/gas/aarch64/illegal-memtag.l: Likewise. + * testsuite/gas/aarch64/illegal-memtag.s: Likewise. + +2019-01-25 Wu Heng + + PR gas/23940 + * macro.c (getstring): Check array bound before accessing. + +2019-01-25 Alan Modra + + PR 20902 + PR 24125 + * read.c (stringer): Delete assertion. + +2019-01-21 Nick Clifton + + * po/uk.po: Updated Ukranian translation. + +2019-01-19 Nick Clifton + + * config.in: Regenerate. + * configure: Regenerate. + * po/gas.pot: Regenerate. + +2018-06-24 Nick Clifton + + 2.32 branch created. + +2019-01-17 Tamar Christina + + * testsuite/gas/arm/archv6t2-1-pe.d: New test. + * testsuite/gas/arm/archv6t2-1.d: Skip pe. + * testsuite/gas/arm/csdb.d: Skip pe. + * testsuite/gas/arm/sb-thumb1-pe.d: New test. + * testsuite/gas/arm/sb-thumb1.d: Skip pe. + * testsuite/gas/arm/sb-thumb2-pe.d: New test. + * testsuite/gas/arm/sb-thumb2.d: Skip pe. + * testsuite/gas/arm/udf.d: Skip pe. + +2019-01-16 Kito Cheng + + * testsuite/gas/riscv/attribute-empty.d: New. + +2019-01-16 Kito Cheng + Nelson Chu + + * config/tc-riscv.c (DEFAULT_RISCV_ATTR): Define to 0 if not defined. + (riscv_set_options): Add `arch_attr` field. + (riscv_opts): Set default value for arch_attr. + (riscv_write_out_arch_attr): New. + (riscv_set_public_attributes): Likewise. + (riscv_md_end): Likewise. + (riscv_convert_symbolic_attribute): Likewise. + (s_riscv_attribute): Likewise. + (explicit_arch_attr): Likewise. + (riscv_pseudo_table): Add .attribute to the table. + (options): Add OPTION_ARCH_ATTR and OPTION_NO_ARCH_ATTR + enumeration constants. + (md_longopts): Add `march-attr' and `mno-arch-attr' options. + (md_parse_option): Handle the new options. + (md_show_usage): Document the `march-attr' option. + * config/tc-riscv.h (md_end): Define as riscv_md_end + (riscv_md_end): Declare. + (CONVERT_SYMBOLIC_ATTRIBUTE): Define as + riscv_convert_symbolic_attribute. + (riscv_convert_symbolic_attribute): Declare. + (start_assemble): Declare. + * testsuite/gas/elf/elf.exp: Adjust test case for section2.e. + * testsuite/gas/elf/section2.e-riscv: New. + * testsuite/gas/riscv/attribute-01.d: New test + * testsuite/gas/riscv/attribute-02.d: Likewise. + * testsuite/gas/riscv/attribute-03.d: Likewise. + * testsuite/gas/riscv/attribute-04.d: Likewise. + * testsuite/gas/riscv/attribute-04.s: Likewise. + * testsuite/gas/riscv/attribute-05.d: Likewise. + * testsuite/gas/riscv/attribute-05.s: Likewise. + * testsuite/gas/riscv/attribute-06.d: Likewise. + * testsuite/gas/riscv/attribute-06.s: Likewise. + * testsuite/gas/riscv/attribute-07.d: Likewise. + * testsuite/gas/riscv/attribute-07.s: Likewise. + * testsuite/gas/riscv/attribute-08.d: Likewise. + * testsuite/gas/riscv/attribute-08.s: Likewise. + * testsuite/gas/riscv/attribute-unknown.d: Likewise. + * testsuite/gas/riscv/attribute-unknown.s: Likewise. + * testsuite/gas/riscv/empty.l: Likewise. + * doc/c-riscv.texi (.attribute): Add documentation. + * configure.ac (--enable-default-riscv-attribute): New options. + * configure: Re-generate. + * config.in: Re-generate. + +2019-01-16 John Darrington + + * config/tc-s12z.c (lex_reg_name): Compare the length of the strings + before the contents. + * testsuite/gas/s12z/labels.d: New file. + * testsuite/gas/s12z/labels.s: New file. + * testsuite/gas/s12z/s12z.exp: Add them. + * config/tc-s12z.c (tfr): Change as_bad to as_warn. + Also fix message typo and semantics. + * config/tc-s12z.c (emit_opr): Emit BFD_RELOC_S12Z_OPR instead of + BFD_RELOC_24. + * testsuite/gas/s12z/opr-indirect-expr.d: Expect R_S12Z_OPR instead + of R_S12Z_EXT24. + +2019-01-14 Srinath Parvathaneni + + * config/tc-arm.c (arm_ext_v6k_v6t2): Define. + (insns) [ARM_VARIANT]: Modified. + (insns) [THUMB_VARIANT]: To implement few ARMv6K instructions + in ARMv6T2 as well. + * testsuite/gas/arm/archv6t2-1.d: New test. + * testsuite/gas/arm/archv6t2-1.s: Likewise. + * testsuite/gas/arm/archv6t2-2.d: Likewise. + 2019-01-11 Alan Modra PR 23963