X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=gcc%2FChangeLog;h=7b1f54d6d89e77161cc6fe55db2f110889f14303;hb=b5bcaa4a74c02648eb45c015ff03c15cdac82fe1;hp=384245996248fde5317544b04e223edf940336d6;hpb=50025f916d5c996973bcc0af1b020f1857c4e7ed;p=gcc.git diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 38424599624..7b1f54d6d89 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,803 @@ +2011-09-26 Bingfeng Mei + * doc/tm.texi: Correct documentation for TARGET_ADDR_SPACE_SUBSET_P. + * target.def: (addr_space_subset_p): Likewise. + +2011-09-26 Tom de Vries + + * tree-ssa-alias.h (pt_solution_singleton_p): Declare. + * tree-ssa-structalias.c (pt_solution_singleton_p): New function. + * tree-ssa-ccp.c (fold_builtin_alloca_for_var): Set points-to solution + of new var. + +2011-09-26 Georg-Johann Lay + + PR target/50465 + * config/avr/avr-protos.h (output_reload_insisf): Don't pass insn. + * config/avr/avr.md (*reload_insi, *reload_insf): Change call to + output_reload_insisf. + (adjust_len): Set default to "no". + Remove alternative "yes". Add alternatives: "mov8", "mov16", + "mov32", "ashlqi", "ashrqi", "lshrqi", "ashlhi", "ashrhi", + "lshrhi", "ashlsi, "ashrsi", "lshrsi". + (*movqi, *movhi, *movsi, *ashlqi3, ashlhi3, ashlsi3, + *ashlhi3_const, *ashlsi3_const, ashrqi3, ashrhi3, ashrsi3, + *ashrhi3_const, *ashrsi3_const, *lshrqi3, lshrhi3, *lshrhi3_const, + *lshrsi3_const): Set attribute "adjust_len". + * config/avr/avr.c (output_reload_insisf): Remove parameter "insn". + (output_movsisf): Don't pass insn to output_reload_insisf. + (adjust_insn_length): Handle new alternatives to adjust_len. + Remove handling of ADJUST_LEN_YES. Clean-up code. + +2011-09-26 Eric Botcazou + + * ifcvt.c (noce_try_cmove_arith): Use may_trap_or_fault_p in lieu of + may_trap_p to detect loads that may trap of fault. + +2011-09-26 Georg-Johann Lay + + * config/avr/avr-protos.h (output_reload_inhi): Change prototype. + * config/avr/avr.md (adjust_len): Add "reload_in16" alternative. + (*reload_inhi): Use it. Adapt call to output_reload_inhi to new + prototype. + (*movhi): Split constraint alternative "r,rL" into "r,r" and "r,L". + * config/avr/avr.c: Rename output_reload_insisf_1 to + output_reload_in_const. + (avr_popcount_each_byte): Handle SFmode, too. + (output_reload_in_const): Change so it can handle HI loads, too. + Use avr_popcount_each_byte to work out if scratch register must be + created on the fly. + (output_reload_inhi): Rewrite using output_reload_in_const and... + (output_movhi): ...use it to print constants' loads. + (adjust_insn_length): New case ADJUST_LEN_RELOAD_IN16. Cleanup code. + +2011-09-25 David S. Miller + + * config/sparc/constraints.md (C, P, Z): New constraints for + const_doube, const_int, and const_vector "all ones" values. + Make unused constraint letters comment match reality. + * config/sparc/predicates.md (const_all_ones_operand, + register_or_zero_or_all_ones_operand): New predicates. + * config/sparc/sparc.c (sparc_expand_move): Allow all ones + as well as zero constants when VIS. + (sparc_legitimate_constant_p): Likewise. + * config/sparc/sparc.md (movsi_insn): Add fones alternative. + (movsf_insn): Likewise + (movdi_insn_sp64): Add fone alternative. + (movdf_insn_sp32_v9): Likewise. + (movdf_insn_sp64): Likewise. + + * configure.ac: Add feature check to make sure the assembler + supports the FMAF, HPC, and VIS 3.0 instructions found on + Niagara-3 and later cpus. + * configure: Rebuild. + * config.in: Likewise. + * config/sparc/sparc.opt: New option '-mfmaf'. + * config/sparc/sparc.md: Add float fused multiply-add patterns. + * config/sparc/sparc.h (AS_NIAGARA3_FLAG): New macro. + (ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC): Use it, as needed. + * config/sparc/sol2.h (ASM_CPU32_DEFAULT_SPEC, + ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC): Likewise. + * config/sparc/sparc.c (sparc_option_override): Turn MASK_FMAF on + by default for Niagara-3 and later. Turn it off if TARGET_FPU is + disabled. + (sparc_rtx_costs): Handle 'FMA'. + * doc/invoke.texi: Document -mfmaf. + +2011-09-25 Jakub Jelinek + + * tree-ssa-structalias.c (intra_create_variable_infos): Treat + TYPE_RESTRICT REFERENCE_TYPE parameters like restricted + DECL_BY_REFERENCE parameters. + +2011-09-25 Eric Botcazou + + * tree-eh.c (cleanup_empty_eh): Allow a call to __builtin_stack_restore + if there is no outgoing edge. + + * tree-scalar-evolution.c (simple_iv): Accept all kinds of pointer and + integral types. + +2011-09-25 Ira Rosen + + * tree-vect-slp.c (vect_slp_analyze_bb_1): Split out core part + of vect_analyze_bb here. + (vect_analyze_bb): Loop over vector sizes calling vect_analyze_bb_1. + +2011-09-25 Ira Rosen + + * tree-data-ref.c (dr_analyze_innermost): Add new argument. + Allow not simple iv if analyzing basic block. + (create_data_ref): Update call to dr_analyze_innermost. + (stmt_with_adjacent_zero_store_dr_p, ref_base_address): Likewise. + * tree-loop-distribution.c (generate_memset_zero): Likewise. + * tree-predcom.c (find_looparound_phi): Likewise. + * tree-data-ref.h (dr_analyze_innermost): Add new argument. + +2011-09-24 David S. Miller + + * config/sparc/sparc.h (FIRST_PSEUDO_REGISTER): Bump to 103. + (SPARC_GSR_REG): Define. + (FIXED_REGISTERS): Mark GSR as fixed. + (CALL_USED_REGISTERS): Mark GSR as call used. + (HARD_REGNO_NREGS): GSR is always 1 register. + (REG_CLASS_CONTENTS): Add GSR to ALL_REGS. + (REG_ALLOC_ORDER, REG_LEAF_ALLOC_ORDER): Add GSR to the end. + (REGISTER_NAMES): Add "%gsr". + * config/sparc/sparc.md (UNSPEC_ALIGNADDR, UNSPEC_ALIGNADDRL): + Delete. + (UNSPEC_WRGSR): New unspec. + (GSR_REG): New constant. + (type): Add new insn type 'gsr'. + (fpack16_vis, fpackfix_vis, fpack32_vis, + faligndata_vis)): Add use of GSR_REG. + (wrgsr_vis, *wrgsr_sp64, wrgsr_v8plus, rdgsr_vis, *rdgsr_sp64, + rdgsr_v8plus): New expanders and insns. + (alignaddr_vis, alignaddrl_vis): Reimplement + using patterns which show that this is a plus in addition to a + modification of GSR_REG, instead of an unspec. + * config/sparc/ultra1_2.md: Handle 'gsr'. + * config/sparc/ultra3.md: Likewise. + * config/sparc/niagara.md: Likewise. + * config/sparc/niagara2.md: Likewise. + * config/sparc/sparc.c (leaf_reg_remap, sparc_leaf_regs): Fill out + end of table. + (sparc_option_override): Make -mvis imply -mv8plus. + (hard_32bit_mode_classes, hard_64bit_mode_classes): Add entries + for %gsr. + (sparc_vis_init_builtins): Build __builtin_vis_write_gsr and + __builtin_vis_read_gsr. + (sparc_expand_buildin): Handle builtins that take one argument and + return void. + (sparc_fold_builtin): Never fold writes to %gsr. + * config/sparc/visintrin.h (__vis_write_gsr, __vis_read_gsr): New. + * doc/extend.texi: Document new VIS intrinsics. + +2011-09-23 Jan Hubicka + + * ipa-inline-transform.c (inline_call): Add comment. + * ipa-inline.h (inline_param_summary): New structure and vector. + (struct inline_edge_summary): Add param field. + * ipa-inline-analysis.c (CHANGED): New constant. + (add_clause): Handle CHANGED and NOT_CONSTANT. + (predicate_probability): New function. + (dump_condition): Dump CHANGED predicate. + (evaluate_conditions_for_known_args): Handle ERROR_MARK as marker + of unknown function wide invariant. + (evaluate_conditions_for_edge): Handle change probabilities. + (inline_edge_duplication_hook): Copy param summaries. + (inline_edge_removal_hook): Free param summaries. + (dump_inline_edge_summary): Fix dumping of indirect edges and callee sizes; + dump param summaries. + (will_be_nonconstant_predicate): Use CHANGED predicate. + (record_modified_bb_info): New structure. + (record_modified): New function. + (param_change_prob): New function. + (estimate_function_body_sizes): Compute param summaries. + (estimate_edge_size_and_time): Add probability argument. + (estimate_node_size_and_time): Add inline_param_summary argument; + handle predicate probabilities. + (remap_predicate): Fix formating. + (remap_edge_change_prob): New function. + (remap_edge_summaries): Rename from ...; use remap_edge_change_prob. + (remap_edge_predicates): ... this one. + (inline_merge_summary): Remap edge summaries; handle predicate probabilities; + remove param summaries after we are done. + (do_estimate_edge_time): Update. + (do_estimate_edge_growth): Update. + (read_inline_edge_summary): Read param info. + (inline_read_summary): Fix formating. + (write_inline_edge_summary): Write param summaries. + +2011-09-23 Jakub Jelinek + + * config/i386/i386.c (ix86_print_operand): Handle %~. + (ix86_print_operand_punct_valid_p): Return true also for '~'. + * config/i386/sse.md (i128): New mode_attr. + (vec_extract_hi_, vec_extract_hi_, + avx_vbroadcastf128_, *avx_vperm2f128_full, + *avx_vperm2f128_nozero, vec_set_lo_, + vec_set_hi_, *vec_concat_avx): Use in the + patterns, use "" for "mode" attribute. + (vec_extract_hi_v16hi, vec_extract_hi_v32qi, vec_set_lo_v16hi, + vec_set_hi_v16hi, vec_set_lo_v32qi, vec_set_hi_v32qi): Use + %~128 in the patterns, use "OI" for "mode" attribute. + +2011-09-23 Georg-Johann Lay + + PR target/50447 + * config/avr/avr.md (adjust_len): Add alternatives "tsthi", + "tstsi", "compare". + (*cmpqi_sign_extend): Use s8_operand. + (*cmphi, *cmpsi): Rewrite using avr_out_compare. + * config/avr/avr-protos.h (compare_diff_p, compare_eq_p): Remove + prototypes. + (out_tsthi, out_tstsi): Remove prototypes. + (avr_out_tsthi, avr_out_tstsi): New prototypes. + * config/avr/avr.c (out_tsthi, out_tstsi): Remove functions. + (avr_asm_len): Negative length now sets *plen to -length. + (compare_sign_p): Return bool instead of int. + (compare_diff_p, compare_eq_p): Ditto and make static. + (avr_out_tsthi): New function. + (avr_out_tstsi): New function. + (avr_out_compare): New function. + (adjust_insn_length): Handle ADJUST_LEN_TSTHI, ADJUST_LEN_TSTSI, + ADJUST_LEN_COMPARE. + +2011-09-23 Georg-Johann Lay + + PR target/50447 + * config/avr/avr.md: (adjust_len): Add alternative "out_plus". + (addsi3): Rewrite using QI scratch register. Adjust text + peepholes using plus:SI. + (*addsi3_zero_extend.hi): New insn. + (*subsi3_zero_extend.hi): New insn. + (*subhi3_zero_extend1): Set attribute "cc" to "set_czn". + (*subsi3_zero_extend): Ditto. + (subsi3): Change predicate #2 to register_operand. + * config/avr/avr-protos.h (avr_out_plus): New prototype. + (avr_out_plus_1): New static function. + (avr_out_plus): New function. + (adjust_insn_length): Handle ADJUST_LEN_OUT_PLUS. + +2011-09-23 Jakub Jelinek + + * config/i386/i386.c (ix86_prepare_sse_fp_compare_args): For + GE/GT/UNLE/UNLT swap arguments and condition even for TARGET_AVX. + +2011-09-23 Ian Lance Taylor + + * godump.c (go_define): Treat a single character in single quotes, + or a string, as an operand. + +2011-09-23 Martin Jambor + + * ipa-prop.h (jump_func_type): Updated comments. + (ipa_known_type_data): New type. + (ipa_jump_func): Use it to describe known type jump functions. + * ipa-prop.c (ipa_print_node_jump_functions_for_edge): Updated to + reflect the new known type jump function contents. + (compute_known_type_jump_func): Likewise. + (combine_known_type_and_ancestor_jfs): Likewise. + (try_make_edge_direct_virtual_call): Likewise. + (ipa_write_jump_function): Likewise. + (ipa_read_jump_function): Likewise. + * ipa-cp.c (ipa_value_from_known_type_jfunc): New function. + (ipa_value_from_jfunc): Use ipa_value_from_known_type_jfunc. + (propagate_accross_jump_function): Likewise. + +2011-09-23 Georg-Johann Lay + + PR target/50446 + * config/avr/avr.md (rotlqi3): Support all offsets 0..7. + (rotlqi3_4): Turn insn into expander. + (*rotlqi3): New insn. + (rotlhi3, rotlsi3): Support rotate left/right by 1. + (*rotlhi2.1, *rotlhi2.15): New insns. + (*rotlsi2.1, *rotlsi2.31): New insns. + * config/avr/constraints.md (C03, C05, C06, C07): New constraints. + +2011-09-23 Bin Cheng + + * config/arm/bpabi.h (BE8_LINK_SPEC): Add cortex-m arch + and processors. + +2011-09-22 Maxim Kuvyrkov + + * ipa-prop.c (ipa_print_node_jump_functions): Fix typos. + +2011-09-22 Andreas Krebbel + + * reload.c (find_reloads): Set operand_mode to Pmode for address + operands consisting of just a CONST_INT. + +2011-09-22 Uros Bizjak + + PR target/50482 + * config/i386/i386.c (ix86_expand_sse_movcc): When generating + blendv, force op_true to register if it doesn't satisfy + nonimmediate_operand predicate. + +2011-09-22 Richard Sandiford + + PR middle-end/50113 + PR middle-end/50061 + * calls.c (emit_library_call_value_1): Use BLOCK_REG_PADDING to + get the locate.where_pad value for register-only arguments. + * config/arm/arm.c (arm_pad_arg_upward): Remove HFmode handling. + (arm_pad_reg_upward): Handle null types. + +2011-09-22 Jan Hubicka + + * ipa-inline-analysis.c: Fix overly long lines. + +2011-09-22 Jan Hubicka + + * ipa-inline-transform.c (inline_call): Always update jump functions + after inlining. + * ipa-inline.c (ipa_inline): Likewise; do not call + ipa_create_all_structures_for_iinln. + (ipa_inline): Always free jump functions. + * ipa-inline-analysis.c (evaluate_conditions_for_edge): Remove hack. + (remap_edge_predicates): Fix pasto. + (inline_merge_summary): Remove nlined edge predicate; remove hack. + (inline_analyze_function): Always initialize jump functions. + (inline_generate_summary): Likewise. + (inline_write_summary): Always write jump functions when ipa-cp + is not doing that. + (inline_read_summary): Always read jump functions when ipa-cp + is not doing that. + * ipa-prop.c (iinlining_processed_edges): Remove. + (update_indirect_edges_after_inlining): Do not use + iinlining_processed_edges; instead set param_index to -1. + (propagate_info_to_inlined_callees): Only try to indirect inlining + when asked to do so; update jump functions of indirect calls, too; + remove jump functions of the inlined edge. + (ipa_edge_duplication_hook): Do not copy iinlining_processed_edges. + (ipa_create_all_structures_for_iinln): Remove. + (ipa_free_all_structures_after_iinln): Do not free + iinlining_processed_edges. + * ipa-prop.h (ipa_create_all_structures_for_iinln): Remove. + +2011-09-22 Richard Sandiford + + * config/arm/predicates.md (expandable_comparison_operator): New + predicate, extracted from... + (arm_comparison_operator): ...here. + * config/arm/arm.md (cbranchsi4, cbranchsf4, cbranchdf4, cbranchdi4) + (cstoresi4, cstoresf4, cstoredf4, cstoredi4, movsicc, movsfcc) + (movdfcc): Use expandable_comparison_operator. + +2011-09-22 Georg-Johann Lay + + PR target/50447 + PR target/50465 + * config/avr/avr-protos.h (avr_out_bitop): New prototype. + (avr_popcount_each_byte): New prototype. + * config/avr/avr.c (avr_popcount): New static function. + (avr_popcount_each_byte): New function. + (avr_out_bitop): New function. + (adjust_insn_length): ADJUST_LEN_OUT_BITOP dispatches to + avr_out_bitop. Cleanup code. + * config/avr/constraints.md (Ca2, Co2, Cx2): New constraints. + (Ca4, Co4, Cx4): New constraints. + * config/avr/avr.md (adjust_len): Add "out_bitop" insn attribute + alternative. + (andhi3, iorhi3, xorhi3): Rewrite insns using avr_out_bitop. + (andsi3, iorsi3, xorsi3): Ditto. + (*iorhi3_clobber, *iorsi3_clobber): Remove insns. + +2011-09-22 Ira Rosen + + PR tree-optimization/50451 + * tree-vect-slp.c (vect_get_constant_vectors): Don't fail for + constant operands in reduction. + (vect_get_slp_defs): Don't create vector operand for NULL scalar + operand. + +2011-09-22 David S. Miller + + * config/sparc/sparc.c (sparc_vis_init_builtins): Do not mark + fpack16, fpack32, fpackfix as const. + + * config/sparc/sparc.md (G[0-7]_REG, O[0-7]_REG, L[0-7]_REG, + I[0-7]_REG, F[0-62]_REG, FCC[0-3]_REG, CC_REG, SFP_REG): New + constants. Use them everywhere. + +2011-09-22 Oleg Endo + + * config/sh/sh.c (andcosts): Renamed to and_xor_ior_costs. + Added AND special case. Adapted comments. + (sh_rtx_costs): Added XOR and IOR case. + +2011-09-21 Jan Hubicka + + * ipa-inline-analsis.c (compute_inline_parameters): Set + cfun and current_function_decl. + +2011-09-21 Jan Hubicka + + * ipa-inline-analysis.c (set_cond_stmt_execution_predicate): Allow + handled components in parameter of builtin_constant_p. + (will_be_nonconstant_predicate): Allow loads of non-SSA parameters. + +2011-09-21 Jan Hubicka + + * ipa-inline.c (relative_time_benefit): Fix wrong bracketting. + * ipa-inline.h (estimate_edge_time): Fix pasto. + * ipa-inline-analysis.c (do_estiamte_edge_time): Remove capping. + +2011-09-21 Jakub Jelinek + + * config/i386/i386.c (ix86_expand_sse_movcc): Use + blendvps, blendvpd and pblendvb if possible. + +2011-09-21 Uros Bizjak + + PR target/50464 + * config/i386/sse.md (xop_pcmov_): Change + operand 1 predicate to register_operand and operand 2 predicate + to nonimmediate_operand. + * config/i386/i386.c (ix86_expand_sse_movcc): When generating + xop_pcmov, force op_true to register. Also, force op_false to + register if it doesn't satisfy nonimmediate_operand predicate. + +2011-09-21 Kirill Yukhin + + * config/i386/bmi2intrin.h (_mulx_u64): New. + (_mulx_u32): Ditto. + +2011-09-21 Jan Hubicka + + PR tree-optimization/50433 + * ipa-inline-analysis.c (eliminated_by_inlining_prob): + Use get_base_address. + +2011-09-21 Jakub Jelinek + + * config/i386/sse.md (3 smaxmin:VI124_128 expander): Use + nonimmediate_operand instead of register_operand predicate for operands + 1 and 2, force them into registers if expanding them as comparison. + (3 umaxmin:VI124_128 expander): Similarly. For UMAX + V8HImode force into register just operand 1. + +2011-09-21 Georg-Johann Lay + + PR target/45099 + * config/avr/avr.c (avr_function_arg_advance): Change error to + warning if a fixed register is needed as function argument. + +2011-09-21 Georg-Johann Lay + + PR target/50449 + PR target/50465 + * config/avr/avr.md (adjust_len): New insn attribute. + (*reload_insi, *reload_insf): Use it. + (*movsi, *movsf): Use new interface of output_movsisf. + * config/avr/avr-protos.h (output_movsisf): Change prototype. + * config/avr/avr.c (output_movsisf): Ditto. + (adjust_insn_length): Use insn attribute "adjust_len" to adjust + lengths of insns *reload_insi, *reload_insf. + (output_reload_insisf_1): New static function. + (output_reload_insisf): Use it. + +2011-09-21 David S. Miller + + * config/sparc/sparc.c (def_builtin): Change from macro into function. + (def_builtin_const): New. + (sparc_vis_init_builtins): Use def_builtin_const for all VIS builtins + other than alignaddr and falignaddr. + + * config/sparc/sparc.md (UNSPEC_FCMPLE, UNSPEC_FCMPNE, UNSPEC_FCMPGT, + UNSPEC_FCMPEQ): New unspec codes. + (fcmple16_vis, fcmple32_vis, fcmpne16_vis, fcmpne32_vis, fcmpgt16_vis, + fcmpgt32_vis, fcmpeq16_vis, fcmpeq32_vis): New patterns. + * config/sparc/sparc.c (sparc_vis_init_builtins): Create builtins for + new pixel compare VIS patterns. + * config/sparc/visintrin.h (__vis_fcmple16, __vis_fcmple32, + __vis_fcmpne16, __vis_fcmpne32, __vis_fcmpgt16, __vis_fcmpgt32, + __vis_fcmpeq16, __vis_fcmpeq32): New. + * doc/extend.texi: Document new pixel compare VIS intrinsics. + +2011-09-21 Tom de Vries + + * final.c (final): Handle if JUMP_LABEL is not LABEL_P. + +2011-09-20 David S. Miller + + * config/sparc/sparc.md (UNSPEC_ALIGNADDRL): New unspec. + (aligneddrl_vis): New pattern. + (edge8_vis, edge8l_vis, edge16_vis, edge16l_vis, edge32_vis, + edge32l_vis): Adjust to take Pmode arguments, and return SImode. + * config/sparc/sparc.c (sparc_vis_init_builtins): Handle new + alignaddrl insn, and adjust edge operations for updated types. + * config/sparc/visintrin.h: Likewise. + * doc/extend.texi: Make typing in VIS documentation match reality. + +2011-09-20 Terry Guo + + * config/arm/arm-arches.def: Add armv6s-m. + * config/arm/arm-tables.opt: Regenerate. + +2011-09-20 Wei Guozhi + + PR rtl-optimization/49452 + * postreload.c (reload_combine): Invalidate use information when across + volatile insn. + +2011-09-19 Maxim Kuvyrkov + + * haifa-sched.c (has_edge_p, prev_non_location_insn, check_cfg): + Remove maintenance overhead. + (haifa_sched_init, sched_finish): Update. + +2011-09-19 Uros Bizjak + + * config/i386/mmx.md (*mov_internal_rex64): Use if_then_else RTX + to calculate unit, prefix_rep and prefix_data16 attributes. + (*mov_internal): Ditto for unit attribute. + (*movv2sf_internal_rex64): Ditto for unit and prefix_rep attributes. + (*movv2sf_internal): Ditto. + * config/i386/sse.md (VI1248_256): Remove mode iterator. + (avx2_eq3): Use VI_256 instead of VI1248_256. + (*avx2_eq3): Ditto. + (avx2_gt3): Ditto. + +2011-09-19 Uros Bizjak + + * config/i386/i386.md (maxmin): New code iterator. + * config/i386/sse.md (3): Macroize expander + from 3 and 3 using maxmin + code iterator. + (*avx2_3): Macroize isn from + *avx2_3 and *avx2_3 using + maxmin code iterator. + (3): Merge with v8hi3. + (3): Merge with umaxv4si3 and + v16qi3. + +2011-09-19 Alan Modra + Michael Meissner + + PR target/50341 + * config/rs6000/rs6000.md (call_indirect_aix): Do not + split the load of the indirect function's TOC from the call to + prevent the compiler from moving the load of the new TOC above + code that references the current function's TOC. + (call_indirect_aix_internal): Ditto. + (call_indirect_aix_nor11): Ditto. + (call_indirect_aix_internal2): Ditto. + (call_value_indirect_aix): Ditto. + (call_value_indirect_aix_internal): Ditto. + (call_value_indirect_aix_nor11): Ditto. + (call_value_indirect_aix_internal2): Ditto. + +2011-09-19 Jakub Jelinek + + * config/i386/sse.md (*sse4_1_extractps): Change into + define_insn_and_split, add =x 0 n and =x x n alternatives + and split them after reload. + +2011-09-19 Alexandre Oliva + + * tree.h (TREE_NOT_CHECK4): Rename from bogus NON_TREE_CHECK4. + +2011-09-19 Alexandre Oliva + + * emit-rtl.c (copy_insn_1): Do not copy DEBUG_EXPRs. + +2011-09-19 Ira Rosen + + PR tree-optimization/50413 + * tree-vect-data-refs.c (vect_analyze_data_refs): Fail to vectorize + a basic block if one of its data-refs can't be analyzed. + +2011-09-19 Paul Brook + + * config/arm/predicates.md (shift_amount_operand): Check constant + shift count is in range. + (const_shift_operand): Remove. + +2011-09-18 Eric Botcazou + Iain Sandoe + + PR target/50091 + * config/rs6000/rs6000.md (probe_stack): Use explicit operand. + * config/rs6000/rs6000.c (output_probe_stack_range): Likewise. + +2011-09-18 H.J. Lu + + * config/i386/bmiintrin.h: Remove tmp. + * config/i386/tbmintrin.h: Likewise. + +2011-09-18 Ira Rosen + + PR tree-optimization/50414 + * tree-vect-slp.c (vect_get_constant_vectors): Handle MAX_EXPR and + MIN_EXPR. + +2011-09-18 Ira Rosen + + PR tree-optimization/50412 + * tree-vect-data-refs.c (vect_analyze_group_access): Fail for + acceses that require epilogue loop if vectorizing outer loop. + +2011-09-17 David S. Miller + + * config/sparc/sparc.md (UNSPEC_EDGE8, UNSPEC_EDGE8L, + UNSPEC_EDGE16, UNSPEC_EDGE16L, UNSPEC_EDGE32, UNSPEC_EDGE32L): + New unspecs. + (define_attr type): New type 'edge'. + (edge8_vis, edge8l_vis, edge16_vis, edge16l_vis, edge32_vis, + edge32l_vis): New patterns. + * config/sparc/ultra1_2.md: Add insn reservation for 'edge'. + * config/sparc/ultra3.md: Likewise. + * config/sparc/niagara.md: Likewise. + * config/sparc/niagara2.md: Likewise. + * config/sparc/sparc.d (sparc_vis_init_builtins): Generate + builtins for VIS edge instructions. + * config/sparc/visintrin.h (__vis_edge8, __vis_edge8l) + (__vis_edge16, __vis_edge16l, __vis_edge32, __vis_edge32l): New + intrinsics. + (__v8qi, __v4qi): Make unsigned. + (__vis_faligndatadi, ___vis_faligndatav2si, __vis_faligndatav4hi, + __vis_faligndatav8qi, __vis_fmul8x16au, __vis_fmul8x16al, + __vis_fpack32): Fix types. + * doc/extend.texi: Document new 'edge' VIS intrinsics. + + * gcc/config/sparc/sparc.c (niagara2_costs): Adjust integer + divide costs. + (niagara3_costs): New. + (sparc_option_override): Use it. + * gcc/config/sparc/niagara2.md: Adjust with more accurate + Niagara-3 reservations. + +2011-09-17 Jakub Jelinek + + * config/i386/sse.md (VIMAX_AVX2): Change V4DI to V2TI. + (sse2_avx, sseinsnmode): Add V2TI. + (REDUC_SMINMAX_MODE): New mode iterator. + (reduc_smax_v4sf, reduc_smin_v4sf, reduc_smax_v8sf, + reduc_smin_v8sf, reduc_smax_v4df, reduc_smin_v4df): Remove. + (reduc__): New smaxmin and umaxmin expanders. + (sse2_lshrv1ti3): Rename to... + (_lshr3): ... this. Use VIMAX_AVX2 mode + iterator. Move before umaxmin expanders. + * config/i386/i386.h (VALID_AVX256_REG_MODE, + SSE_REG_MODE_P): Accept V2TImode. + * config/i386/i386.c (ix86_expand_reduc): Handle V32QImode, + V16HImode, V8SImode and V4DImode. + + * config/i386/i386.c (ix86_build_const_vector): Handle V8SImode + and V4DImode. + (ix86_build_signbit_mask): Likewise. + (ix86_expand_int_vcond): Likewise. Handle V16HImode and V32QImode. + (bdesc_args): Use CODE_FOR_{s,u}m{ax,in}v{32q,16h,8s}i3 + instead of CODE_FOR_avx2_{s,u}m{ax,in}v{32q,16h,8s}i3. + * config/i386/sse.md (avx2_3 umaxmin expand): Rename to... + (3) ... this. + (avx2_3 smaxmin expand): Rename to... + (3) ... this. + (smax3, smin3): Macroize using smaxmin code iterator. + (smaxv2di3, sminv2di3): Macroize using smaxmin code iterator and + VI8_AVX2 mode iterator. + (umaxv2di3, uminv2di3): Macroize using umaxmin code iterator and + VI8_AVX2 mode iterator. + (vcond, vcondu): + New expanders. + +2011-09-17 Richard Sandiford + + * config/ia64/itanium2.md: Use match_test rather than eq/ne symbol_ref + throughout file. + +2011-09-16 David S. Miller + + * config/sparc/visintrin.h: New file. + * config.gcc: Add it to extra_headers on sparc. + +2011-09-16 Jakub Jelinek + + * config/i386/i386.c (ix86_expand_reduc_v4sf): Rename to ... + (ix86_expand_reduc): ... this. Handle also V8SFmode and V4DFmode. + * config/i386/sse.md (reduc_splus_v4sf, reduc_smax_v4sf, + reduc_smin_v4sf): Adjust callers. + (reduc_smax_v8sf, reduc_smin_v8sf, reduc_smax_v4df, reduc_smin_v4df): + New expanders. + + * config/i386/sse.md (vec_extract_hi_, + vec_extract_hi_v16hi, vec_extract_hi_v32qi): Use + vextracti128 instead of vextractf128 for -mavx2 and + integer vectors. For V4DFmode fix up mode attribute. + (VEC_EXTRACT_MODE): For TARGET_AVX add 32-byte vectors. + (vec_set_lo_, vec_set_hi_): For VI8F_256 modes use V4DF + instead of V8SF mode attribute. + (avx2_extracti128): Change into define_expand. + * config/i386/i386.c (ix86_expand_vector_extract): Handle + 32-byte vector modes if TARGET_AVX. + +2011-09-16 Georg-Johann Lay + + * config/avr/avr.md: (umulqihi3, mulqihi3): Write as one pattern. + (umulqi3_highpart, smulqi3_highpart): Ditto. + (*maddqihi4.const, *umaddqihi4.uconst): Ditto. + (*msubqihi4.const, *umsubqihi4.uconst): Ditto. + (*muluqihi3.uconst, *mulsqihi3.sconst): Ditto. + +2011-09-16 Georg-Johann Lay + + PR target/50358 + * config/avr/avr.md (*ashiftqihi2.signx.1): New insn. + (*maddqi4, *maddqi4.const): New insns. + (*msubqi4, *msubqi4.const): New insns. + * config/avr/avr.c (avr_rtx_costs): Record costs of above in cases + PLUS:QI and MINUS:QI. Increase costs of multiply-add/-sub for + HImode by 1 in the case of multiplying with a CONST_INT. + Record cost of *ashiftqihi2.signx.1 in case ASHIFT:QI. + +2011-09-15 Jan Hubicka + + PR lto/50430 + * gimple-fold.c (gimple_get_virt_method_for_binfo): Do not ICE on + error_mark_node in the DECL_INITIAL of vtable. + +2011-09-15 Diego Novillo + + * Makefile.in (SYSROOT_CFLAGS_FOR_TARGET): Define from + @SYSROOT_CFLAGS_FOR_TARGET@. + * configure.ac (SYSROOT_CFLAGS_FOR_TARGET): Set from build-sysroot. + * configure: Regenerate. + (site.exp): Add definition of TEST_ALWAYS_FLAGS. + Remove setting of GCC_UNDER_TEST. + +2011-09-15 Uros Bizjak + + * config/i386/i386.c (output_fp_compare): Return %v prefixed + instruction mnemonics for TARGET_AVX. + + * config/i386/i386.md (*movdf_internal_rex64): use cond RTX in + "type" attribute calculation. + (*movdf_internal): Ditto. + (*movsf_internal): Ditto. + +2011-09-15 James Greenhalgh + + * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): New builtin macro. + +2011-09-15 Jason Merrill + + PR c++/50361 + * expr.c (count_type_elements): Handle NULLPTR_TYPE. + +2011-09-15 Jan Hubicka + + * ipa-inline-analysis.c (add_condition): Add conditions parameter; + simplify obviously true clauses. + (and_predicates, or_predicates): Add conditions parameter. + (inline_duplication_hoook): Update. + (mark_modified): New function. + (unmodified_parm): New function. + (eliminated_by_inlining_prob, (set_cond_stmt_execution_predicate, + set_switch_stmt_execution_predicate, will_be_nonconstant_predicate): + Use unmodified_parm. + (estimate_function_body_sizes): Update. + (remap_predicate): Update. + +2011-09-15 Ira Rosen + + * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Allow + read-after-read dependencies in basic block SLP. + +2011-09-14 Richard Sandiford + + * config/sparc/sparc.md: Use match_test rather than eq/ne symbol_ref + throughout file. + +2011-09-14 Richard Sandiford + + * config/sh/sh.md: Use match_test rather than eq/ne symbol_ref + throughout file. + +2011-09-14 Richard Sandiford + + * config/s390/s390.md: Use match_test rather than eq/ne symbol_ref + throughout file. + +2011-09-14 Richard Sandiford + + * config/rs6000/rs6000.md: Use match_test rather than eq/ne symbol_ref + throughout file. + * config/rs6000/constraints.md: Likewise. + +2011-09-14 Richard Sandiford + + * config/microblaze/microblaze.md: Use match_test rather than + eq/ne symbol_ref throughout file. + +2011-09-14 Richard Sandiford + + * config/bfin/bfin.md: Use match_test rather than eq/ne symbol_ref + throughout file. + 2011-09-14 Tom de Vries PR middle-end/50251 @@ -8,8 +808,7 @@ * config/arm/arm.c (arm_override_options): Add unaligned_access support. - (arm_file_start): Emit attribute for unaligned access as - appropriate. + (arm_file_start): Emit attribute for unaligned access as appropriate. * config/arm/arm.md (UNSPEC_UNALIGNED_LOAD) (UNSPEC_UNALIGNED_STORE): Add constants for unspecs. (insv, extzv): Add unaligned-access support. @@ -97,7 +896,7 @@ * ipa-inline-transform.c (can_remove_node_now_p): Fix thunkos. 2011-09-13 Paul Brook - + * config/arm/arm.h (ASM_PREFERRED_EH_DATA_FORMAT): Define. (ARM_TARGET2_DWARF_FORMAT): Provide default definition. * config/arm/linux-eabi.h (ARM_TARGET2_DWARF_FORMAT): Define. @@ -116,7 +915,7 @@ * ginclude/unwind-arm-common.h: New file. 2011-09-13 Georg-Johann Lay - + PR target/50358 * config/avr/predicates.md (const_1_to_6_operand): New predicate. * config/avr/avr.md: (extend_s): New code attribute. @@ -220,8 +1019,7 @@ PR tree-optimization/50343 * tree-vect-patterns.c (vect_recog_dot_prod_pattern): Check - that the reduction is over an SSA name before checking its - definition. + that the reduction is over an SSA name before checking its definition. 2011-09-11 Richard Sandiford