X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=gcc%2FChangeLog;h=e37b77c5732d3236a359bb654e8d682b82018139;hb=c0587ee5deda229a18dd129d69c17c540214bcf8;hp=c9d1a16180673b649b7d302f227c63079eeca730;hpb=e3d62871c36f7209a18a20e52b245672a45bf81b;p=gcc.git diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c9d1a161806..e37b77c5732 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,467 @@ +2016-06-28 John David Anglin + + * config/pa/pa.md (call_symref_64bit_post_reload): Don't call + pa_output_arg_descriptor. + (call_val_symref_64bit_post_reload): Likewise. + (call_val_powf_64bit_post_reload): Likewise. + (sibcall_internal_symref_64bit): Likewise. + (sibcall_value_internal_symref_64bit): Likewise. + +2016-06-28 Jakub Jelinek + + PR middle-end/71626 + * config/i386/i386.c (ix86_expand_vector_move): For SUBREG of + a constant, force its SUBREG_REG into memory or register instead + of whole op1. + +2016-06-28 Pitchumani Sivanupandi + + PR target/58655 + * config/avr/avr.opt (-mfract-convert-truncate): Update description. + * doc/invoke.texi (AVR Options): Document it. + +2016-06-28 Walter Lee + + * config/tilegx/linux.h: Do not include arch/icache.h + (CLEAR_INSN_CACHE): Provide inlined definition directly. + * config/tilepro/linux.h: Do not include arch/icache.h + (CLEAR_INSN_CACHE): Provide inlined definition directly. + +2016-06-28 Wilco Dijkstra + + * tree-ssa-math-opts.c (find_bswap_or_nop_1): Adjust bitnumbering + for big-endian BIT_FIELD_REF. + +2016-06-28 Pat Haugen + + * config/rs6000/rs6000.md ('type' attribute): Add htmsimple/dfp types. + ('size' attribute): Add '128'. + Include power9.md. + (*mov_hardfloat32, *mov_hardfloat64, *movdi_internal32, + *movdi_internal64, *movdf_update1): Set size attribute to '64'. + (add3, sub3, mul3, div3, sqrt2, + copysign3, neg2_hw, abs2_hw, *nabs2_hw, + *fma4_hw, *fms4_hw, *nfma4_hw, *nfms4_hw, + extend2_hw, truncdf2_hw, + *xscvqpwz_, *xscvqpdz_, *xscvdqp_, + *truncdf2_odd): Set size attribute to '128'. + (*cmp_hw): Change type to veccmp and set size attribute to '128'. + * config/rs6000/power6.md (power6-fp): Include dfp type. + * config/rs6000/power7.md (power7-fp): Likewise. + * config/rs6000/power8.md (power8-fp): Likewise. + * config/rs6000/power9.md: New file. + * config/rs6000/t-rs6000 (MD_INCLUDES): Add power9.md. + * config/rs6000/htm.md (*tabort, *tabortc, *tabortci, + *trechkpt, *treclaim, *tsr, *ttest): Change type attribute to + htmsimple. + * config/rs6000/dfp.md (extendsddd2, truncddsd2, extendddtd2, + trunctddd2, adddd3, addtd3, subdd3, subtd3, muldd3, multd3, divdd3, + divtd3, *cmpdd_internal1, *cmptd_internal1, floatdidd2, floatditd2, + ftruncdd2, fixdddi2, ftrunctd2, fixtddi2, dfp_ddedpd_, + dfp_denbcd_, dfp_dxex_, dfp_diex_, dfp_dscli_, + dfp_dscri_): Change type attribute to dfp. + * config/rs6000/crypto.md (crypto_vshasigma): Change type + attribute to vecsimple. + * config/rs6000/rs6000.c (power9_cost): Update costs, cache size + and prefetch streams. + (rs6000_option_override_internal): Remove temporary code setting + tuning to power8. Don't set rs6000_sched_groups for power9. + (last_scheduled_insn): Change to rtx_insn *. + (divide_cnt, vec_load_pendulum): New variables. + (rs6000_adjust_cost): Add Power9 to test for store->load separation. + (rs6000_issue_rate): Set issue rate for Power9. + (is_power9_pairable_vec_type): New. + (power9_sched_reorder2): New. + (rs6000_sched_reorder2): Call new function for Power9 specific + reordering. + (insn_must_be_first_in_group): Remove Power9. + (insn_must_be_last_in_group): Likewise. + (force_new_group): Likewise. + (rs6000_sched_init): Fix initialization of last_scheduled_insn. + Initialize divide_cnt/vec_load_pendulum. + (_rs6000_sched_context, rs6000_init_sched_context, + rs6000_set_sched_context): Handle context save/restore of new + variables. + +2016-06-28 Richard Biener + + * tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p): + Properly handle DECL_BIT_FIELD_REPRESENTATIVE occuring as + COMPONENT_REF operand. + (nonoverlapping_component_refs_p): Likewise. + * stor-layout.c (start_bitfield_representative): Mark + DECL_BIT_FIELD_REPRESENTATIVE as DECL_NONADDRESSABLE_P. + +2016-06-28 Jakub Jelinek + + * Makefile.in: Don't cat ../stage_current if it does not exist. + + * doc/extend.texi (__builtin_add_overflow_p): Clarify behavior when + last argument is a bit-field. + + PR rtl-optimization/71673 + * internal-fn.c (expand_arith_overflow_result_store): Use + OPTAB_LIB_WIDEN instead of OPTAB_DIRECT as last argument to + expand_simple_binop. + + PR middle-end/66867 + * builtins.c (expand_ifn_atomic_compare_exchange_into_call, + expand_ifn_atomic_compare_exchange): New functions. + * internal-fn.c (expand_ATOMIC_COMPARE_EXCHANGE): New function. + * tree.h (build_call_expr_internal_loc): Rename to ... + (build_call_expr_internal_loc_array): ... this. Fix up type of + last argument. + * internal-fn.def (ATOMIC_COMPARE_EXCHANGE): New internal fn. + * predict.c (expr_expected_value_1): Handle IMAGPART_EXPR of + ATOMIC_COMPARE_EXCHANGE result. + * builtins.h (expand_ifn_atomic_compare_exchange): New prototype. + * gimple-fold.h (optimize_atomic_compare_exchange_p, + fold_builtin_atomic_compare_exchange): New prototypes. + * gimple-fold.c (optimize_atomic_compare_exchange_p, + fold_builtin_atomic_compare_exchange): New functions.. + * tree-ssa.c (execute_update_addresses_taken): If + optimize_atomic_compare_exchange_p, ignore &var in 2nd argument + of call when finding addressable vars, and if such var becomes + non-addressable, call fold_builtin_atomic_compare_exchange. + +2016-06-27 Segher Boessenkool + + PR target/71670 + * config/rs6000/rs6000.md (ashdi3_extswsli_dot): Use + gen_ashdi3_extswsli_dot2 instead of gen_ashdi3_extswsli_dot. + +2016-06-27 Pat Haugen + + * config/rs6000/rs6000.md ('type' attribute): Add + veclogical,veccmpfx,vecexts,vecmove insn types. + (*abs2_fpr, *nabs2_fpr, *neg2_fpr, *extendsfdf2_fpr, + copysign3_fcpsgn, truncdf2_internal1, neg2_internal, + p8_fmrgow_, pack): Change type to fpsimple. + (*xxsel, copysign3_hard, neg2_hw, abs2_hw, + *nabs2_hw): Change type to vecmove. + (*and3_internal, *bool3_internal, *boolc3_internal, + *boolcc3_internal, *eqv3_internal, + *one_cmpl3_internal, *ieee_128bit_vsx_neg2_internal, + *ieee_128bit_vsx_abs2_internal, + *ieee_128bit_vsx_nabs2_internal, extendkftf2, trunctfkf2, + *ieee128_mfvsrd_64bit, *ieee128_mfvsrd_32bit, *ieee128_mtvsrd_64bit, + *ieee128_mtvsrd_32bit): Change type to veclogical. + (mov_hardfloat, *mov_hardfloat32, *mov_hardfloat64, + *movdi_internal32, *movdi_internal64): Update insn types. + * config/rs6000/vsx.md (*vsx_le_undo_permute_, + vsx_extract_): Change type to veclogical. + (*vsx_xxsel, *vsx_xxsel_uns): Change type to vecmove. + (vsx_sign_extend_qi_, *vsx_sign_extend_hi_, + *vsx_sign_extend_si_v2di): Change type to vecexts. + * config/rs6000/altivec.md (*altivec_mov, *altivec_movti): Change + type to veclogical. + (*altivec_eq, *altivec_gt, *altivec_gtu, + *altivec_vcmpequ_p, *altivec_vcmpgts_p, + *altivec_vcmpgtu_p): Change type to veccmpfx. + (*altivec_vsel, *altivec_vsel_uns): Change type to vecmove. + * config/rs6000/dfp.md (*negdd2_fpr, *absdd2_fpr, *nabsdd2_fpr, + negtd2, *abstd2_fpr, *nabstd2_fpr): Change type to fpsimple. + * config/rs6000/40x.md (ppc405-float): Add fpsimple. + * config/rs6000/440.md (ppc440-fp): Add fpsimple. + * config/rs6000/476.md (ppc476-fp): Add fpsimple. + * config/rs6000/601.md (ppc601-fp): Add fpsimple. + * config/rs6000/603.md (ppc603-fp): Add fpsimple. + * config/rs6000/6xx.md (ppc604-fp): Add fpsimple. + * config/rs6000/7xx.md (ppc750-fp): Add fpsimple. + (ppc7400-vecsimple): Add veclogical, vecmove, veccmpfx. + * config/rs6000/7450.md (ppc7450-fp): Add fpsimple. + (ppc7450-vecsimple): Add veclogical, vecmove. + (ppc7450-veccmp): Add veccmpfx. + * config/rs6000/8540.md (ppc8540_simple_vector): Add veclogical, + vecmove. + (ppc8540_vector_compare): Add veccmpfx. + * config/rs6000/a2.md (ppca2-fp): Add fpsimple. + * config/rs6000/cell.md (cell-fp): Add fpsimple. + (cell-vecsimple): Add veclogical, vecmove. + (cell-veccmp): Add veccmpfx. + * config/rs6000/e300c2c3.md (ppce300c3_fp): Add fpsimple. + * config/rs6000/e6500.md (e6500_vecsimple): Add veclogical, vecmove, + veccmpfx. + * config/rs6000/mpc.md (mpccore-fp): Add fpsimple. + * config/rs6000/power4.md (power4-fp): Add fpsimple. + (power4-vecsimple): Add veclogical, vecmove. + (power4-veccmp): Add veccmpfx. + * config/rs6000/power5.md (power5-fp): Add fpsimple. + * config/rs6000/power6.md (power6-fp): Add fpsimple. + (power6-vecsimple): Add veclogical, vecmove. + (power6-veccmp): Add veccmpfx. + * config/rs6000/power7.md (power7-fp): Add fpsimple. + (power7-vecsimple): Add veclogical, vecmove, veccmpfx. + * config/rs6000/power8.md (power8-fp): Add fpsimple. + (power8-vecsimple): Add veclogical, vecmove, veccmpfx. + * config/rs6000/rs64.md (rs64a-fp): Add fpsimple. + * config/rs6000/titan.md (titan_fp): Add fpsimple. + * config/rs6000/xfpu.md (fp-default, fp-addsub-s, fp-addsub-d): Add + fpsimple. + * config/rs6000/rs6000.c (rs6000_adjust_cost): Add TYPE_FPSIMPLE. + +2016-06-27 Peter Bergner + + PR target/71656 + * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add + OPTION_MASK_P9_DFORM_VECTOR. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not + disable -mpower9-dform-vector when using reload. + (quad_address_p): Remove 'gpr_p' argument and all associated code. + New 'strict' argument. Update all callers. Add strict addressing + support. + (rs6000_legitimate_offset_address_p): Remove call to + virtual_stack_registers_memory_p. + (rs6000_legitimize_reload_address): Add quad address support. + (rs6000_legitimate_address_p): Move call to quad_address_p above + call to virtual_stack_registers_memory_p. Adjust quad_address_p args + to account for new strict usage. + (rs6000_output_move_128bit): Adjust quad_address_p args to account + for new strict usage. + * config/rs6000/predicates.md (quad_memory_operand): Likewise. + +2016-06-26 Uros Bizjak + + PR target/70902 + PR target/71453 + PR target/71555 + PR target/71596 + PR target/71657 + * config/i386/i386.c (ix86_spill_class): Disable condition to + always return NO_REGS. + +2016-06-26 Jan Hubicka + + * predict.c: Include gimple-pretty-print.h + (predicted_by_loop_heuristics_p): Check also + PRED_LOOP_EXIT_WITH_RECURSION + (predict_loops): Find self recursive calls and use special purpose + predictors for them; dump log about decisions. + (pass_profile::execute): Dump info about #of iterations. + * predict.def (PRED_LOOP_EXIT_WITH_RECURSION, + (PRED_LOOP_GUARD_WITH_RECURSION): New predictors. + +2016-06-26 John David Anglin + + * config/pa/pa.c (pa_output_indirect_call): Rework to combine + output_asm_insn calls and shorten long lines. Output .CALL + argument descriptor using pa_output_arg_descriptor. Add various + inline $$dyncall and other optimizations. + (pa_attr_length_indirect_call): Adjust ordering and lengths. + +2016-06-25 Jakub Jelinek + + PR tree-optimization/71643 + * tree-ssa-tail-merge.c (find_clusters_1): Ignore basic blocks with + EH preds. + + * tree-ssa-tail-merge.c (deps_ok_for_redirect_from_bb_to_bb): Don't + leak a bitmap if dep_bb is NULL. + + PR tree-optimization/71631 + * tree-ssa-reassoc.c (reassociate_bb): Pass true as last argument + to rewrite_expr_tree even if negate_result, move new_lhs var + declaration and initialization earlier, for powi_result set afterwards + new_lhs to lhs. For negate_result, use new_lhs instead of tmp + if new_lhs != lhs, and don't shadow gsi var. + +2016-06-24 Jan Hubicka + + * predict.c (predict_paths_leading_to, predict_paths_leading_to_edge): + Add in_loop parameter. + (predict_loops): Add loop guard heuristics. + * predict.def (PRED_LOOP_GUARD): New heuristics. + +2016-06-24 Jan Hubicka + + * predict.c: Include ipa-utils.h + (tree_bb_level_prediction): Predict recursive calls. + (tree_estimate_probability_bb): Skip inexpensive calls for call + predictor. + * predict.def (PRED_RECURSIVE_CALL): New. + +2016-06-24 Bill Schmidt + + * config/rs6000/rs6000-builtin.def (BU_FLOAT128_2): New #define. + (BU_FLOAT128_1): Likewise. + (FABSQ): Likewise. + (COPYSIGNQ): Likewise. + (RS6000_BUILTIN_NANQ): Likewise. + (RS6000_BUILTIN_NANSQ): Likewise. + (RS6000_BUILTIN_INFQ): Likewise. + (RS6000_BUILTIN_HUGE_VALQ): Likewise. + * config/rs6000/rs6000.c (rs6000_fold_builtin): New prototype. + (TARGET_FOLD_BUILTIN): New #define. + (rs6000_builtin_mask_calculate): Add TARGET_FLOAT128 entry. + (rs6000_invalid_builtin): Add handling for RS6000_BTM_FLOAT128. + (rs6000_fold_builtin): New target hook implementation, handling + folding of 128-bit NaNs and infinities. + (rs6000_init_builtins): Initialize const_str_type_node; ensure all + entries are filled in to avoid problems during bootstrap + self-test; define builtins for 128-bit NaNs and infinities. + (rs6000_opt_mask): Add entry for float128. + * config/rs6000/rs6000.h (RS6000_BTM_FLOAT128): New #define. + (RS6000_BTM_COMMON): Include RS6000_BTM_FLOAT128. + (rs6000_builtin_type_index): Add RS6000_BTI_const_str. + (const_str_type_node): New #define. + * config/rs6000/rs6000.md (copysign3 for IEEE128): Convert + to a define_expand that dispatches to either copysign3_soft + or copysign3_hard. + (copysign3_hard): Rename from copysign3. + (copysign3_soft): New define_insn. + * doc/extend.texi: Document new builtins. + +2016-06-24 Jakub Jelinek + + * cfgloop.c (flow_loop_dump): Cast nit to uint64_t and print it using + PRIu64 instead of lu. + +2016-06-24 Eric Botcazou + + PR debug/71642 + * tree-inline.c (remap_decl): When fixing up DECL_ORIGINAL_TYPE, just + copy the type name. + +2016-06-24 Jakub Jelinek + + PR tree-optimization/71647 + * omp-low.c (lower_rec_input_clauses): Convert + omp_clause_aligned_alignment (c) to size_type_node for the + last argument of __builtin_assume_aligned. + +2016-06-24 H.J. Lu + + * configure.ac (calling ___tls_get_addr via GOT): New + assembler/linker check. + (HAVE_AS_IX86_TLS_GET_ADDR_GOT): New. Defined to 1 if 32-bit + assembler and linker supports calling ___tls_get_addr via GOT. + Otherise, defined to 0. + * config.in: Regenerated. + * configure: Likewise. + * config/i386/constraints.md (Yb): New constraint. + * config/i386/i386.h (reg_class): Add TLS_GOTBASE_REGS. + (REG_CLASS_NAMES): Likewise. + (REG_CLASS_CONTENTS): Likewise. + * config/i386/i386.md (*tls_global_dynamic_32_gnu): Replace + the b constraint with the Yb constraint. Call ___tls_get_addr + via GOT for GNU TLS with -fno-plt if HAVE_AS_IX86_TLS_GET_ADDR_GOT + is 1. + (*tls_local_dynamic_base_32_gnu): Likewise. + (*tls_global_dynamic_64_): Call _tls_get_addr via GOT for + GNU TLS with -fno-plt if HAVE_AS_IX86_TLS_GET_ADDR_GOT is 1. + (*tls_local_dynamic_base_64_): Likewise. + +2016-06-24 Martin Liska + + * cfgloop.c (flow_loop_dump): Dump average number of loop iterations. + * cfgloop.h: Change 'struct loop' to 'const struct loop' for a + few functions. + * cfgloopanal.c (expected_loop_iterations_unbounded): Set a new + argument to true if the expected number of iterations is + loop-based. + +2016-06-24 Uros Bizjak + + * configure.ac (HAVE_AS_GOTOF_IN_DATA): Use $as_ix86_gas_32_opt to + assemble for 32bit target. + (HAVE_AS_IX86_TLSGDPLT): Use $as_ix86_gas_32_opt to assemble + and $ld_ix86_gld_32_opt to link for 32bit target. + (HAVE_AS_IX86_TLSLDMPLT): Ditto. + * configure: Regenerate. + +2016-06-24 Kyrylo Tkachov + + * config/arm/arm.c (int_log2): Delete definition and prototype. + (shift_op): Use exact_log2 instead of int_log2. + (vfp3_const_double_for_fract_bits): Likewise. + +2016-06-24 Jakub Jelinek + + * internal-fn.c (expand_arith_set_overflow): New function. + (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow): + Use it. + (expand_arith_overflow_result_store): Likewise. Handle precision + smaller than mode precision. + * tree-vrp.c (extract_range_basic): For imag part, handle + properly signed 1-bit precision result. + * doc/extend.texi (__builtin_add_overflow): Document that last + argument can't be pointer to enumerated or boolean type. + (__builtin_add_overflow_p): Document that last argument can't + have enumerated or boolean type. + +2016-06-23 Michael Meissner + Bill Schmidt + + * config/rs6000/predicates.md (splat_input_operand): Rework. + Don't allow constants, since the insns that use this predicate + don't support constants. Constants are handled by other insns + that are created via combine. During and after register + allocation, only allow indexed or indirect addresses, and not + general addresses. Only allow modes supported by the hardware. + * config/rs6000/rs6000.c (xxsplitb_constant_p): Update usage + comment. Move check for using VSPLTIS to a common location, + instead of doing it in two different places. + +2016-06-23 Jocelyn Mayer + + * config/i386/driver-i386.c (host_detect_local_cpu): Set + PROCESSOR_PENTIUMPRO for signature_CENTAUR_ebx family >= 9. + : Pass c7 or nehemiah for + signature_CENTAUR_ebx. + +2016-06-23 H.J. Lu + + PR target/66232 + PR target/67400 + * configure.ac (as_ix86_tls_ldm_opt): Renamed to ... + (as_ix86_gas_32_opt): This. + (ld_ix86_tls_ldm_opt): Renamed to ... + (ld_ix86_gld_32_opt): This. + (R_386_TLS_LDM reloc): Updated. + (R_386_GOT32X reloc): New assembler/linker check. + (HAVE_AS_IX86_GOT32X): New. Defined to 1 if 32-bit assembler and + linker support "jmp *_start@GOT" and "cmpl $0, bar@GOT". Otherise, + defined to 0. + * config.in: Regenerated. + * configure: Likewise. + * config/i386/i386.c (ix86_force_load_from_GOT_p): Return + true if HAVE_AS_IX86_GOT32X is 1 in 32-bit mode. + (ix86_legitimate_address_p): Allow UNSPEC_GOT for -fno-plt + if ix86_force_load_from_GOT_p returns true. + (ix86_print_operand_address_as): Also support UNSPEC_GOT if + ix86_force_load_from_GOT_p returns true. + (ix86_expand_move): Generate UNSPEC_GOT in 32-bit mode to load + the external function address via the GOT slot. + (ix86_nopic_noplt_attribute_p): Check both TARGET_64BIT and + HAVE_AS_IX86_GOT32X before returning false. + (ix86_output_call_insn): Generate "%!jmp/call\t*%p0@GOT" in + 32-bit mode if ix86_nopic_noplt_attribute_p returns true. + +2016-06-23 Eric Botcazou + + * tree-inline.c (remap_decl): Preserve DECL_ORIGINAL_TYPE invariant. + +2016-06-23 Andi Kleen + + * Makefile.in: Regenerate. + * doc/install.texi: Document autoprofiledbootstrap. + +2016-06-23 Andi Kleen + + * config/i386/gcc-auto-profile: New file. + +2016-06-23 Martin Liska + + PR middle-end/71619 + * predict.c (predict_loops): Revert the hunk that was removed + in r237103. + +2016-06-23 Jakub Sejdak + + * config.gcc: Add support for arm*-*-phoenix* targets. + * config/arm/t-phoenix: New. + * config/phoenix.h: New. + 2016-06-23 Uros Bizjak H.J. Lu @@ -73,7 +537,7 @@ 2016-06-22 Ilya Enkovich - PR middle-end/71488 + PR tree-optimization/71488 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Support comparison of boolean vectors. * tree-vect-stmts.c (vectorizable_comparison): Vectorize comparison